Vertical Die-to-Die Interconnect Bridge for Semiconductor Packages
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Solution Overview
Problem
Current solutions for high bandwidth interconnects in semiconductor packages, such as silicon interposers and embedded multi-die interconnect bridges (EMIB), face challenges including high costs, increased package z-height, and real estate trade-offs due to additional bridge component thickness and design constraints, which hinder device miniaturization and performance.
Innovation Solution
A semiconductor package design featuring a substrate with a bridge extending between opposing surfaces, allowing double-sided placement of silicon components, which reduces substrate routing layers and minimizes channel impedance discontinuities, thereby achieving compact form-factor and improved interconnect density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If silicon interposer is used for high bandwidth interconnects, then interconnect density is improved, but package cost increases and package z-height increases
Solution Approach 1:
The invention divides the interconnection function into two parts: a silicon bridge component for high-density vertical interconnects and a conventional organic substrate for routing and support. This segmentation allows the expensive silicon to be used only where high density is needed, rather than requiring a full silicon interposer, thereby reducing overall package cost while maintaining high interconnect density.
Solution Approach 2:
The invention transitions from planar interconnect routing to vertical 3D stacking by embedding the silicon bridge component within the organic substrate. This dimensional change enables high-bandwidth interconnects to pass through the substrate vertically, achieving high interconnect density without increasing package footprint or requiring a full silicon interposer.
2Quantity of substance
If silicon interposer is used for high bandwidth interconnects, then interconnect density is improved, but package z-height increases
Solution Approach 1:
The silicon bridge component is nested within a cavity in the organic substrate, with conductive bumps extending from both top and bottom surfaces. This nesting approach allows the high-density interconnect function to be embedded within the substrate thickness rather than adding to it, reducing overall package z-height compared to a full silicon interposer approach.
3Quantity of substance
If EMIB is used for high density die-to-die interconnections, then interconnect density is improved, but package real estate increases due to keep-out zone requirements
Solution Approach 1:
The invention segments the high-density interconnect function into a dedicated silicon bridge component that can be precisely positioned within the organic substrate. This allows fine-line traces to be routed only where needed through the bridge component, eliminating the need for large keep-out zones across the entire package and reducing overall package real estate.
4Quantity of substance
If additional bridge component thickness is added for EMIB, then interconnect density is improved, but package z-height increases due to design rules constraints
Solution Approach 1:
The bridge component is nested within a cavity in the organic substrate, allowing the component thickness to be accommodated within the substrate depth rather than adding to the overall package z-height. This embedding approach minimizes the impact of design rules constraints on package height while maintaining high interconnect density.
Data Source
AI summary
The present disclosure relates to a semiconductor package that may include a substrate. The substrate may have a top surface and a bottom surface. The semiconductor package may include an opening in the substrate. The semiconductor package may include a bridge disposed in the opening. The bridge may have an upper end at the top surface of the substrate and a lower end at the bottom surface of the substrate. The semiconductor package may include a first die on the top surface of the substrate at least partially extending over a first portion of the upper end of the bridge. The semiconductor package may include a second die on the bottom surface of the substrate at least partially extending over the lower end of the bridge. The bridge may couple the first die to the second die.