Vertical Semiconductor Die Stack Direct PCB Mounting
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Solution Overview
Problem
Conventional semiconductor packages face challenges in maximizing storage capacity in a smaller form factor due to limitations in substrate use and die arrangement, often requiring substrates and wire bonds that increase size and complexity.
Innovation Solution
A semiconductor device configuration where semiconductor die are vertically mounted on a printed circuit board (PCB) with active edges aligned and electrically coupled directly to the PCB, eliminating the need for substrates and wire bonds, and using a die attach film and stealth lasing for precise dicing and stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional substrate and wire bond configuration is used, then electrical connections between die and host device are established, but package size increases and storage density decreases
Solution Approach 1:
The patent transitions from a conventional planar substrate-based architecture to a vertical three-dimensional stacked die configuration. Multiple semiconductor die are stacked vertically and directly mounted on the host device, eliminating the need for a separate substrate plane. This dimensional change from 2D to 3D arrangement maximizes storage capacity within a reduced footprint by utilizing vertical space efficiently.
Solution Approach 2:
The patent removes the substrate from the package architecture entirely. Instead of mounting die on a substrate which then connects to the host device, the die are directly mounted and interconnected in a vertical stack, with electrical connections made directly to the host device. This extraction of the substrate eliminates unnecessary intermediate layers and reduces overall package size.
2Ease of manufacture
If substrate and wire bonds are used for electrical connections, then die can be interconnected, but device complexity and manufacturing steps increase
Solution Approach 1:
The patent eliminates both the substrate and wire bonds from the package structure. Die are directly mounted onto the host device and interconnected through vertical stacking, removing multiple manufacturing steps including substrate preparation, die mounting on substrate, wire bonding, and substrate removal. This simplification reduces device complexity while maintaining electrical connectivity.
Solution Approach 2:
The patent combines multiple functions into the direct vertical stacking approach: mechanical support, electrical connection, and inter die interconnection are all achieved through the same vertical mounting structure. This merging eliminates the need for separate substrate and wire bond components, simplifying both device structure and manufacturing process.
3Reliability
If multiple die are mounted on substrate, then storage capacity increases, but mechanical shock and thermal stress resistance decrease
Solution Approach 1:
The patent arranges multiple semiconductor die in a vertical three-dimensional stack rather than spreading them out on a substrate plane. This vertical configuration reduces the horizontal footprint while improving mechanical reliability by distributing stress vertically through the stack. The direct mounting to the host device provides robust mechanical support that enhances resistance to shock and thermal stress.
Solution Approach 2:
The patent merges the mechanical support function directly into the vertical stacking structure itself, eliminating the need for a separate substrate that would otherwise provide mechanical support. The vertical stack is directly mounted to the host device, creating a more robust mechanical structure that better resists shock and thermal stress while maintaining high storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a high-density, compact arrangement of multiple semiconductor die without substrates or wire bonds, enhancing mechanical shock and thermal stress resistance while reducing costs and performance issues like noise and electrical shorting.
Implementation Method 1
stealth lasing for precise dicing and stacking
Data Source
AI summary
A semiconductor device vertically mounted on a medium such as a printed circuit board, and a method of its manufacture, are disclosed. The semiconductor device includes a stack of semiconductor die having contact pads which extend to an active edge of the die aligned on one side of the stack. The active edges of the die are affixed to the PCB and the contact pads at the active edge are electrically coupled to the PCB. This configuration provides an optimal, high density arrangement of semiconductor die in the device, where a large number of semiconductor die can be mounted and electrically coupled directly to the PCT, without a substrate, without staggering the semiconductor die, and without using wire bonds.