Vertical DMOS Structure for High Channel Density
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Solution Overview
Problem
The existing manufacturing processes for semiconductor devices with lateral DMOS structures are limited by horizontal diffusion, which restricts channel density and integration due to the flow of current in the horizontal direction, leading to increased costs and reduced design diversity.
Innovation Solution
A vertical DMOS structure is implemented with a buried doped layer, trench gate, source and drain contact plugs, and a manufacturing method that includes forming a trench gate, source region, and drain contact plug extending through the body and drift regions to the buried doped layer, allowing for a vertical electron movement path and increased channel density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a lateral DMOS structure is used, then the manufacturing process is simpler, but the channel density is limited and integration degree is reduced
Solution Approach 1:
The patent transitions from a lateral DMOS structure where current flows horizontally to a vertical DMOS structure where current flows vertically from the source region through the drift region to the buried doped layer. This dimensional change allows electrons to move perpendicular to the substrate surface, enabling higher channel density and better integration while maintaining manufacturing feasibility through adapted lithography and etching processes
2Device complexity
If a lateral DMOS structure is used, then the device structure is simpler, but the degree of integration is disadvantageous
Solution Approach 1:
By changing from lateral to vertical current flow, the patent enables higher degree of integration on the IC chip. The vertical structure allows for more compact device arrangement and higher channel density, improving adaptability for integrated circuits while the underlying BCD manufacturing process maintains reasonable structural simplicity
Solution Approach 2:
The vertical DMOS structure integrates multiple functions within a compact area: the buried doped layer serves as both the drain region and a means for electrical connection, the trench gate provides voltage control, and the structure enables high voltage operation. This multi-functionality enhances the degree of integration and design versatility
3Stability of the object's composition
If current flows in horizontal direction, then the lateral DMOS structure is maintained, but the channel density cannot be increased
Solution Approach 1:
The patent fundamentally changes the current flow direction from horizontal to vertical. Electrons are injected from the source region and move vertically through the drift region to reach the buried doped layer, which is positioned deeper than the source contact plug. This vertical current path enables higher channel density by allowing more parallel current channels within the same chip area
Data Source
AI summary
A semiconductor device includes a substrate, a buried doped layer formed on the substrate, a trench gate formed on the buried doped layer, a source region formed adjacent the trench gate, an interlayer dielectric layer formed on the trench gate and the source region, a source contact plug formed to extend and connect to the source region, and a drain contact plug, extending and connecting to the buried doped layer, formed deeper than the source contact plug.