Vertical DMOS Field Plate Structure for Breakdown and RDS(on) Tradeoff
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Solution Overview
Problem
Conventional vertical diffused metal oxide semiconductor field effect transistors (DMOS) face challenges in achieving a tradeoff between drain-to-source breakdown voltage and on-resistance, as well as high gate-to-drain capacitance, due to the difficulty in adjusting the JFET opening width or doping concentration.
Innovation Solution
The semiconductor structure incorporates a conductive structure with a vertical field plate and horizontal field plate, which penetrates through the epitaxy layer to suppress on-resistance while maintaining breakdown voltage, and separates gate electrodes to reduce gate-to-drain capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the JFET opening width or doping concentration is adjusted in conventional vertical DMOS, then breakdown voltage can be improved, but on-resistance increases and gate-to-drain capacitance increases
Solution Approach 1:
The gate structure is segmented into separate shield gates and vertical field plates, dividing the traditional single gate into multiple functional components. The shield gate is positioned to specifically control the electric field distribution, while the vertical field plates extend into the drift region to independently manage voltage blocking and resistance characteristics, thereby resolving the tradeoff between breakdown voltage and on-resistance
Solution Approach 2:
The conductive structure extends vertically into the drift region, adding a vertical dimension to the field plate configuration. This vertical extension allows the field plates to interact with the electric field in three dimensions, enabling simultaneous optimization of breakdown voltage through vertical field control and on-resistance through enhanced carrier modulation in the drift region
2Strength
If the JFET opening width or doping concentration is adjusted in conventional vertical DMOS, then breakdown voltage can be improved, but gate-to-drain capacitance increases
Solution Approach 1:
The gate structure is segmented into separate shield gates and vertical field plates, dividing the traditional single gate into multiple functional components. The shield gate is positioned to specifically control the electric field distribution, while the vertical field plates extend into the drift region to independently manage voltage blocking and resistance characteristics, thereby resolving the tradeoff between breakdown voltage and on-resistance
Solution Approach 2:
The shield gate acts as an intermediary element between the control gate and the drain region. It mediates the electric field distribution by shielding the drain junction from direct field lines, thereby reducing the overlap between gate and drain depletion regions and minimizing gate-to-drain capacitance while maintaining breakdown voltage
3Ease of manufacture
If conventional vertical DMOS structure is used, then manufacturing is simplified, but on-resistance is high and performance requirements cannot be met
Solution Approach 1:
The gate structure is segmented into separate shield gates and vertical field plates, dividing the traditional single gate into multiple functional components. The shield gate is positioned to specifically control the electric field distribution, while the vertical field plates extend into the drift region to independently manage voltage blocking and resistance characteristics, thereby resolving the tradeoff between breakdown voltage and on-resistance
Solution Approach 2:
The conductive structure serves multiple functions simultaneously: it acts as a field plate to control electric field distribution, as a shield to reduce capacitance, and as a pathway for carrier modulation to reduce on-resistance. This multi-functionality allows a single structural modification to address multiple performance requirements without proportionally increasing manufacturing complexity
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a substrate, an epitaxy layer, a well region, a gate electrode, a conductive structure, and a source electrode. The substrate has a first conductive type. The epitaxy layer has the first conductive type and is disposed on the substrate. The well region has a second conductive type. The second conductive type is different than the first conductive type. The well region is disposed in the epitaxy layer. The gate electrode is disposed on the well region. The conductive structure includes an upper portion and a lower portion. The lower portion extends in the direction of the substrate into the epitaxy layer and the upper portion is disposed on the epitaxy layer. The source electrode is disposed on the conductive structure.


