Vertical DRAM Trench Shaping via Selective Etching
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Solution Overview
Problem
Existing methods for manufacturing vertical DRAM devices result in sharp corners and thin gate oxides due to octagonal trench shapes, leading to electrical field issues and reliability problems, and fail to selectively etch single-crystal semiconductor relative to amorphous or polycrystalline semiconductor.
Innovation Solution
A method involving selective etching of single-crystal semiconductor using an ammonium hydroxide solution, in the presence of light radiation, to widen the upper trench portion and form a rectangular shape, followed by deposition of a trench top insulating layer and growth of a vertical gate dielectric, allowing for self-aligned trench top shaping and improved isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an octagonal trench shape is used after deep trench etch, then the trench can be formed through the substrate, but sharp corners are formed which lead to thinner gate oxide and higher electrical field
Solution Approach 1:
The patent applies preliminary action by performing trench shaping through selective etching of single-crystal semiconductor sidewalls before gate oxide formation. This advance shaping eliminates sharp corners in the upper trench portion, ensuring uniform gate oxide growth and preventing electrical field concentration at corner regions.
2Shape
If a prior art trench shaping method is used to transform the upper trench portion to rectangular shape, then the shape is improved, but sharp corners are formed between vertical sidewall and horizontal wall portion
Solution Approach 1:
The patent applies local quality by selectively etching only the single-crystal semiconductor sidewalls in the upper trench portion while leaving the amorphous or polycrystalline semiconductor regions unchanged. This localized selective etching creates a rectangular shape without sharp corners at the interface between different semiconductor types, eliminating the reliability issues associated with sharp corners.
3Ease of manufacture
If ammonium hydroxide solution is used to etch silicon, then metal contamination is avoided and compatibility with semiconductor processing is improved, but selective etching of single-crystal relative to amorphous or polycrystalline semiconductor is not achieved
Solution Approach 1:
The patent applies parameter changes by utilizing the crystallographic orientation dependence of the ammonium hydroxide etching process. By controlling etching parameters and exploiting the different etch rates on single-crystal versus amorphous/polycrystalline silicon surfaces, the process achieves high selectivity for single-crystal etching while maintaining the advantages of ammonium hydroxide (no metal contamination, process compatibility).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates sharp corners, ensures uniform gate oxide growth, and enhances the reliability and performance of vertical trench DRAM memory by achieving selective etching of single-crystal semiconductor with respect to amorphous or polycrystalline semiconductor, thereby improving device reliability and performance.
Implementation Method 1
etching the single-crystal semiconductor sidewalls to widen the upper trench portion... in the presence of light radiation sufficient to selectively etch the single-crystal semiconductor
Data Source
AI summary
A method of forming a vertical DRAM device. A lower trench is filled with polycrystalline or amorphous semiconductor for a capacitor. An upper trench portion has exposed sidewalls of single-crystal semiconductor. The method then includes etching the single-crystal semiconductor sidewalls to widen the upper trench portion beyond the exposed upper surface of the semiconductor fill of the capacitor to form exposed regions of single-crystal semiconductor on a bottom portion of the upper trench adjacent to the exposed upper surface of the semiconductor fill. A trench top insulating layer is deposited on the bottom portion of the upper trench, over the upper surface of the semiconductor fill and over the adjacent regions of single-crystal semiconductor. The method then includes forming a vertical gate dielectric layer, wherein the trench top insulating layer extends below the vertical gate insulating layer.