Vertical Driver Circuit for Liquid Crystal Display

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Solution Overview

Problem

In liquid crystal display devices with single-channel common electrode driver circuits, the operational stability is compromised due to increased leak current from floating memory nodes, especially when the threshold voltage is low, leading to potential instability and reduced threshold value likelihood.

Innovation Solution

The implementation of a display device with a vertical driver circuit that includes a shift register circuit and multiple common electrode driver circuits, each comprising transistors and capacitive elements that alternate common voltage outputs based on transfer clocks, enhancing the writing frequency to the floating memory node and reducing leak current through phase-different AC signals and voltage inversion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-channel common electrode driver circuit is used with a floating memory node, then the circuit complexity is reduced, but the operational stability deteriorates due to increased leak current

Engineering Contradiction:
Improvecircuit complexityVSAvoidoperational stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies periodic action by implementing a shift register circuit that sequentially outputs common electrode driving pulses to multiple common basic circuits. Each circuit receives pulses at regular intervals, causing periodic writing to the floating memory node. This periodic refreshing action counteracts the leak current effect, maintaining voltage stability without requiring more complex circuit structures.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent segments the common electrode driver circuit into multiple common basic circuits (first, second, third, etc.), each handling specific common electrodes. The shift register circuit divides the driving pulse generation into sequential stages, with each stage corresponding to a common basic circuit. This segmentation allows distributed memory nodes to be periodically refreshed, reducing the impact of leak current while maintaining overall circuit simplicity.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If the threshold voltage of the transistor connected to the floating memory node is low, then the ease of manufacture is improved, but the operational stability worsens due to increased leak current

Engineering Contradiction:
Improvemanufacturing easeVSAvoidoperational stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The shift register circuit provides periodic common electrode driving pulses that refresh the floating memory node at regular intervals. This periodic action compensates for the higher leak current inherent in low threshold voltage transistors, allowing easier manufacturing without sacrificing operational stability. The frequent writing cycles prevent voltage drift caused by leak current accumulation.

Inventive Principle:
Principle #19Periodic action

3Reliability

If the writing frequency to the floating memory node is increased, then the operational stability is improved, but the device complexity increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent achieves high writing frequency through segmentation of the driver circuit into multiple common basic circuits driven by a shift register. Each segment operates sequentially, allowing the system to maintain high overall writing frequency without requiring each individual node to be complex. The segmented architecture distributes the refreshing workload across multiple simple circuits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The shift register circuit introduces dynamic operation by sequentially enabling different common basic circuits at different time intervals. This dynamic sequential operation allows the system to achieve high effective writing frequency across all memory nodes without requiring each node to have complex high-speed circuitry. The temporal distribution of writing operations simplifies individual circuit design while maintaining overall system performance.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8508513B2Display device
Publication Date: 2013.08.13 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US8508513B2 patent drawing
  • US8508513B2 patent drawing
  • US8508513B2 patent drawing

AI summary

A display device which enhances time-wise likelihood for a leak current from a floating memory node by increasing the number of writings of a voltage to a floating memory node. A vertical driver includes: a shift register including basic circuits which output common electrode driving pulses based on a transfer; and a common electrode driver including common basic circuits which receive the common electrode driving pulses and the transfer clock. Each common basic circuit includes: a circuit A which fetches an AC signal based on the common electrode driving pulse; a circuit B which outputs, based on the AC signal, a first common voltage or a second common voltage which differs from the first common voltage in voltage level to the common electrodes corresponding to the AC signal; and a circuit C which holds a state of the circuit B based on the transfer clock.