Vertical Electrode Semiconductor Light Emitting Device

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Solution Overview

Problem

Existing semiconductor light emitting devices require large areas for electrodes, limiting their compactness and electrical efficiency.

Innovation Solution

A semiconductor light emitting device design featuring vertically overlapping first and second electrodes, with the first electrode buried in a opening and electrically connected to the semiconductor layers, and a dielectric layer structure that allows for improved electrical contact and reduced device size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrodes are designed to cover large areas for effective electrical contact, then electrical characteristics are improved, but device size increases

Engineering Contradiction:
Improveelectrical characteristicsVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from planar electrode arrangement to a vertical three-dimensional configuration. The first electrode is positioned at the bottom of a recess and the second electrode is positioned at the top, creating vertical overlap. This dimensional change allows both electrodes to maintain adequate contact area with the semiconductor layers while reducing the lateral footprint of the device, thereby improving electrical characteristics without increasing device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the first electrode is embedded within a recess formed in the semiconductor layers, and the second electrode is positioned above it with vertical overlap. This nesting arrangement allows the electrodes to be contained within a compact vertical space, maximizing electrical contact area while minimizing the overall device footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If device size is reduced for compactness, then compactness is improved, but electrical contact area is reduced

Engineering Contradiction:
Improvedevice sizeVSAvoidelectrical characteristics
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By moving from a two-dimensional planar electrode layout to a three-dimensional vertical arrangement, the patent achieves compact lateral dimensions while maintaining adequate electrical contact area through vertical stacking and overlapping of electrodes, thus resolving the contradiction between device compactness and electrical performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent incorporates a dielectric layer between the first and second electrodes that fills the space between them. This dielectric layer provides electrical insulation and mechanical support, ensuring stable electrical characteristics while allowing the electrodes to be positioned in close vertical proximity, thereby maintaining compact device size without compromising electrical reliability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Area of stationary object

If vertical electrode arrangement is implemented, then device compactness is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice sizeVSAvoidmanufacturing process
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the electrode formation process into distinct segments: first forming a recess, then forming the first electrode within the recess, forming the dielectric layer, and finally forming the second electrode with vertical overlap. This segmentation of the manufacturing process makes the complex vertical electrode arrangement more manageable and suitable for standard semiconductor fabrication techniques.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by first forming the recess and the first electrode before forming the dielectric layer and second electrode. This sequential preliminary preparation simplifies subsequent manufacturing steps, as the foundation structure is already in place, reducing overall manufacturing complexity despite the vertical arrangement.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enhances electrical characteristics and reduces device size by allowing for a smaller electrode area while maintaining effective electrical connectivity, leading to improved performance and compactness.

Implementation Method 1

Light emitting devices emit light converted from energy generated from recombination of electrons and holes contained in combined semiconductors

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS11515449B2Semiconductor light emitting device and method of fabricating the same
Publication Date: 2022.11.29 SAMSUNG ELECTRONICS CO LTD
  • US11515449B2 patent drawing
  • US11515449B2 patent drawing
  • US11515449B2 patent drawing

AI summary

Semiconductor light emitting devices and methods of fabricating the same are provided. The semiconductor light emitting device includes a light emitting structure, a first electrode, a first dielectric layer, a second electrode, and a vertical conductive pattern. The light emitting structure includes a first semiconductor layer, an active layer, and a second semiconductor layer that are sequentially stacked, and includes a first opening that penetrates the second semiconductor layer and the active layer, the first opening exposing the first semiconductor layer. The first electrode fills at least a portion of the first opening. The first dielectric layer is on the first electrode. The second electrode is on the light emitting structure and covers the first dielectric layer, the second electrode being electrically connected to the second semiconductor layer. The vertical conductive pattern surrounds outer lateral surfaces of the light emitting structure and is electrically connected to the first electrode.