High-Aspect-Ratio Via Structure for Vertical Electrode Connection
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing the spacing between components due to limitations in packaging techniques, particularly for smaller electronic devices, where traditional methods struggle to efficiently integrate high aspect ratio vias for vertical component mounting.
Innovation Solution
The formation of high aspect ratio vias between components vertically mounted on a substrate, utilizing a process involving a substrate with conductive features, hard masks, seed layers, and conductive materials to create a conductive via that reduces spacing and enables efficient electrical coupling between top and bottom electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional packaging techniques are used, then manufacturing process is simpler, but spacing between components cannot be reduced
Solution Approach 1:
The patent transitions from traditional planar packaging to three-dimensional vertical packaging by forming high aspect ratio vias that extend vertically through the substrate. This dimensional change allows components to be stacked vertically rather than arranged only in the planar direction, thereby reducing the spacing between components while managing the increased packaging complexity through structured via formation processes.
2Quantity of substance
If component size is reduced, then integration density improves, but packaging technique limitations prevent further spacing reduction
Solution Approach 1:
The patent segments the packaging structure into distinct vertical layers with high aspect ratio vias separating and connecting different component levels. This segmentation allows each layer to be optimized independently for manufacturing, enabling reduced component spacing and improved integration density while maintaining feasibility through modular fabrication processes.
3Area of stationary object
If vertical component mounting is implemented, then spacing between components is reduced, but via formation process becomes more complex
Solution Approach 1:
The patent applies preliminary actions by forming hard masks and seed layers before creating the high aspect ratio vias. These preliminary structures are deposited and patterned in advance to define the via locations and guide the subsequent via formation process, thereby enabling vertical component mounting and reduced spacing while managing the complexity through pre-planned fabrication steps.
Data Source
AI summary
Embodiments provide a high aspect ratio via for coupling a top electrode of a vertically oriented component to the substrate, where the top electrode of the component is coupled to the via by a conductive bridge, and where the bottom electrode of the component is coupled to substrate. Some embodiments provide for mounting the component by a component wafer and separating the components while mounted to the substrate. Some embodiments provide for mounting individual components to the substrate.