Vertical Ferroelectric Memory Structure for Fast 3D Nonvolatile Storage
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Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high integration density and high operation speed while maintaining low power consumption and nonvolatility.
Innovation Solution
The semiconductor memory device incorporates a vertical channel structure with ferroelectric layers and intermediate insulating layers, where word lines and back-gate electrodes are vertically stacked, allowing for efficient data storage and retrieval operations with low power consumption, and separating read and write paths to prevent data disturbance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are three-dimensionally arranged to increase data storage capacity, then integration density is improved, but device complexity increases
Solution Approach 1:
The patent transitions from two-dimensional planar memory cell arrangements to three-dimensional vertical stacking, where word lines and bit lines are stacked in multiple layers above the substrate. This dimensional change enables significantly higher integration density by utilizing the vertical space above each memory cell, allowing multiple memory cells to be stacked vertically while maintaining manageable device complexity through systematic layering and routing.
2Quantity of substance
If conventional memory structures are used to achieve high integration density, then data storage capacity increases, but operation speed deteriorates
Solution Approach 1:
The patent segments the memory device into distinct functional layers including word lines, bit lines, select lines, and intermediate insulating layers. Each layer is independently optimized for its specific function, allowing simultaneous access to multiple memory cells across different layers without interference. This segmentation enables parallel read/write operations, significantly improving operation speed while maintaining high integration density through the three-dimensional stacked architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high integration density, fast operation, and low power consumption, while maintaining nonvolatility by utilizing ferroelectric materials for data storage, allowing for efficient data writing, erasing, and reading with reduced power usage.
Implementation Method 1
a ferroelectric layer disposed between the word lines and the first side of the vertical channel
Data Source
AI summary
Disclosed are semiconductor memory devices and electronic systems including the same. The semiconductor memory device may include a vertical channel perpendicular to a top surface of a substrate, word lines disposed on a first side of the vertical channel and vertically stacked on the substrate, back-gate electrodes disposed on a second side of the vertical channel and vertically stacked on the substrate, a ferroelectric layer disposed between the word lines and the first side of the vertical channel, a first intermediate insulating layer disposed between the ferroelectric layer and the first side of the vertical channel, and a second intermediate insulating layer disposed between the back-gate electrodes and the second side of the vertical channel.