Vertical FET Active Region Etching for High-Stack Miniaturization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing vertical FET devices face challenges in miniaturization due to the large height difference exceeding the coverage capacity of photoresist, especially with increasing stacked layers, limiting the effectiveness of current manufacturing methods.
Innovation Solution
A method involving a stack of source/drain and channel defining layers on a substrate, using a mask layer and patterned photoresist to etch specific depths, forming an isolation trench to define the active region, reducing the need for extensive photoresist coverage and enhancing etching capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photoresist coverage is used to define the active region, then the photoresist can cover the entire stack height, but the height difference exceeds the coverage capacity of photoresist as the number of stacked layers increases
Solution Approach 1:
The patent divides the single-step etching process into multiple sequential etching steps, each with its own photoresist application and etching operation. The first etching step defines the active region with a first photoresist, and the second etching step forms the isolation trench with a second photoresist. This segmentation allows each photoresist layer to cover only the height required for that specific etching step, rather than requiring one photoresist to cover the entire stack height.
Solution Approach 2:
The patent performs preliminary etching actions to create intermediate structures before completing the final structure. The first etching step preliminarily defines the active region boundaries, and the second etching step completes the isolation trench formation. This preliminary action approach allows each etching step to work with a reduced height difference, making photoresist coverage feasible for each step.
2Ease of manufacture
If a single etching step is used to form both the active region and isolation trench, then the process is simpler, but the photoresist coverage capacity is exceeded due to large height difference
Solution Approach 1:
The patent segments the etching process into distinct steps, each with specific photoresist application and etching operations. The first etching step uses a first photoresist to define the active region, and the second etching step uses a second photoresist to form the isolation trench. This segmentation maintains manufacturing precision by ensuring each photoresist layer covers only the necessary height for its specific etching step.
Solution Approach 2:
The patent introduces intermediate structures (first etched region, second etched region) as mediators between the initial stack and the final structure. These intermediate regions serve as temporary features that facilitate the step-by-step etching process, allowing each photoresist layer to work effectively within its coverage capacity while contributing to the final active region and isolation trench formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved etching of the active region, facilitating the manufacturing of vertical devices with precise control over the active and isolation trench formation, thereby supporting miniaturization efforts.
Implementation Method 1
etching off, in the first region, a first depth of the stack based on the patterned photoresist; and further etching off, in the first region and a second region on an inner side of the first region, a second depth of the stack based on the mask layer
Data Source
AI summary
The present disclosure provides a method of manufacturing a vertical device by firstly etching an active region of the device, which may be applied to the field of semiconductor technology. The method includes: providing a stack of a first source/drain defining layer, a channel defining layer and a second source/drain defining layer on a substrate; providing a mask layer on the stack; providing a patterned photoresist on the stack, where the patterned photoresist exposes a first region; etching off, in the first region, a first depth of the stack based on the patterned photoresist; and further etching off, in the first region and a second region on an inner side of the first region, a second depth of the stack based on the mask layer, where the stack is penetrated by the etching off and the further etching off in the first region to form an isolation trench.