Vertical FET Differential Top Spacer Oxygen Vacancy Mitigation
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Solution Overview
Problem
Vertical transport field effect transistors (VTFETs) face challenges with the replacement metal gate process due to thermal degradation at elevated temperatures during top source and drain formation, leading to increased leakage current in n-channel designs and threshold voltage increase in p-channel designs.
Innovation Solution
A thermally stable VTFET design is achieved by using a differential top spacer configuration, where an oxide spacer layer supplies oxygen to fill vacancies in the gate dielectric of p-channel devices, and setting the workfunction metal to a critical thickness above 3.0 nanometers, ensuring thermal stability and simplifying the fabrication process by using the same workfunction metal for both n-channel and p-channel devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional replacement metal gate process is used with top source and drains grown at elevated temperatures (≥600°C), then top source and drain formation is achieved, but gate leakage current increases dramatically for n-channel devices and threshold voltage increases for p-channel devices
Solution Approach 1:
An oxide spacer layer is introduced as an intermediary between the top source/drain and the gate stack. This oxide spacer acts as a protective barrier that supplies oxygen to fill vacancies in the gate dielectric during high-temperature processing, preventing direct thermal degradation of the gate stack while allowing top source and drain formation to proceed
Solution Approach 2:
The oxide spacer layer is formed in advance before the high-temperature top source and drain growth process. This preliminary structure preparation ensures that oxygen is already in position to fill vacancies in the gate dielectric during subsequent thermal processing, preventing gate degradation before it occurs
2Manufacturing precision
If different workfunction metals are used for n-channel and p-channel devices, then threshold voltage control is improved, but fabrication process complexity increases
Solution Approach 1:
The invention applies local quality by making the top spacer structure different for n-channel and p-channel devices while using the same workfunction metal for both. The oxide spacer is present only in p-channel devices to supply oxygen, while n-channel devices have a different spacer configuration, allowing threshold voltage control through localized structural differences rather than different metals
Solution Approach 2:
The invention changes the structural parameters of the top spacer rather than changing the material composition of the workfunction metal. By varying the presence and configuration of the oxide spacer layer, different electrical characteristics are achieved for n-channel and p-channel devices while maintaining process simplicity through a single workfunction metal deposition step
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution maintains thermal stability and reduces leakage current and threshold voltage fluctuations, ensuring reliable performance even at high temperatures, and simplifies the fabrication process by using the same workfunction metal for both n-channel and p-channel devices.
Implementation Method 1
the oxide spacer layer supplies oxygen filling the oxygen vacancies in the gate dielectric only in the gate stacks alongside the PFET fins
Implementation Method 2
annealing the gate stacks which generates oxygen vacancies in the gate dielectric
Data Source
AI summary
VTFET devices having a differential top spacer are provided. In one aspect, a method of forming a VTFET device includes: patterning fins in a wafer including NFET and PFET fins; forming bottom source and drains at a base of the NFET/PFET fins; forming bottom spacers on the bottom source and drains; forming gate stacks alongside the NFET/PFET fins that include a same workfunction metal on top of a gate dielectric; annealing the gate stacks which generates oxygen vacancies in the gate dielectric; forming top spacers that include an oxide spacer layer in contact with only the gate stacks alongside the PFET fins, wherein the oxide spacer layer supplies oxygen filling the oxygen vacancies in the gate dielectric only in the gate stacks alongside the PFET fins; and forming top source and drains above the gate stacks at the tops of the NFET/PFET fins. A VTFET device is also provided.