Vertical-Transport FET Gate Contacts Over Active Region
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Solution Overview
Problem
Current semiconductor device fabrication methods for vertical-transport field-effect transistors face challenges in efficiently forming and isolating gate structures around semiconductor fins, which affects the vertical current direction and device performance.
Innovation Solution
The method involves forming semiconductor fins with a gate stack section that wraps around each fin, using a metal gate capping layer, and creating contacts through an interlayer dielectric layer to connect the gate stack sections, allowing for vertical contact formation and improved conductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate stack section is formed to wrap around a semiconductor fin in a vertical-transport field-effect transistor, then the device achieves vertical current transport and improved gate control, but the fabrication process becomes more complex and difficult compared to planar structures
Solution Approach 1:
The patent applies preliminary action by forming the gate stack section to wrap around the semiconductor fin before completing other device structures. This pre-formed gate stack serves as a template that guides subsequent fabrication steps, including the formation of source/drain regions and contacts, thereby simplifying the overall complex fabrication process while maintaining the vertical transport configuration
Solution Approach 2:
The fabrication process is segmented into distinct modular steps: first forming the gate stack section around the fin, then separately forming source/drain regions, and finally creating contacts. This segmentation allows each component to be optimized independently and simplifies the complex fabrication sequence by breaking it into manageable stages
2Reliability
If contacts are formed to extend vertically through the interlayer dielectric layer to contact the gate stack section, then electrical connection to the gate is achieved, but the contact formation process requires precise alignment and increases manufacturing difficulty
Solution Approach 1:
The gate stack section is formed in advance with a configuration that pre-determines the contact locations. The vertical extension features of the gate stack serve as alignment references for subsequent contact formation, eliminating the need for complex alignment procedures and reducing manufacturing precision requirements
Solution Approach 2:
The gate stack section's vertical structure self-provides alignment features that guide contact formation. The contact holes are automatically aligned to the gate stack by using the gate stack's own vertical features as the alignment reference, making the contact formation process self-aligning and reducing external alignment requirements
3Reliability
If the contact is arranged to surround the gate stack section, then the contact effectively connects to the gate structure, but the contact geometry becomes more complex requiring additional processing steps
Solution Approach 1:
The surrounding contact structure is segmented into the vertical contact portion extending through the interlayer dielectric and the horizontal portion that surrounds the gate stack base. This segmentation allows each portion to be formed by different simplified processes, reducing the overall geometric complexity while maintaining the surrounding connection configuration
Data Source
AI summary
Methods and structures that include a vertical-transport field-effect transistor. First and second semiconductor fins are formed that project vertically from a bottom source/drain region. A first gate stack section is arranged to wrap around a portion of the first semiconductor fin, and a second gate stack section is arranged to wrap around a portion of the second semiconductor fin. The first gate stack section is covered with a placeholder structure. After covering the first gate stack section with the placeholder structure, a metal gate capping layer is deposited on the second gate stack section. After depositing the metal gate capping layer on the second gate stack section, the placeholder structure is replaced with a contact that is connected with the first gate stack section.