Vertical FET Gate Uniformity via Seed Layer Deposition
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Solution Overview
Problem
Forming metal gates in vertical field effect transistors is challenging due to the loading effect, which causes non-uniform metal deposition heights and uneven gate lengths, making it difficult to align the top surface of the gate layer with the channel structures.
Innovation Solution
A method involving the deposition of a seed layer on horizontal surfaces followed by selective metal gate deposition using anisotropic processes, ensuring uniform depth and eliminating the need for recessing the gate material, thereby maintaining consistent gate length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional deposition-recess process is used to form metal gates, then the gate can be formed with initial metal deposition, but the loading effect causes non-uniform metal deposition heights and uneven gate lengths
Solution Approach 1:
A seed layer is deposited on the channel structure before metal gate deposition. This preliminary seed layer creates a controlled nucleation surface that ensures uniform metal deposition across all channel regions, preventing the loading effect from causing non-uniform gate heights and lengths.
Solution Approach 2:
The seed layer is selectively deposited only on specific regions (horizontal surfaces around vertical channels) rather than uniformly across all surfaces. This localized seeding approach ensures that metal deposition occurs uniformly only where needed, achieving consistent gate lengths while avoiding unnecessary processing of other areas.
2Manufacturing precision
If the loading effect is present during metal deposition, then deposition can proceed, but the etch rate varies with area size causing severe non-uniformity in metal gate thickness
Solution Approach 1:
The deposition process parameters are changed by introducing a seed layer that modifies the nucleation and growth characteristics of the metal deposition. This seed layer creates a uniform surface that promotes consistent deposition rates across different area sizes, eliminating the loading effect's impact on thickness uniformity.
3Manufacturing precision
If uneven metal gates are formed due to loading effect, then deposition can complete, but additional recessing steps are required to make gates even before fabrication can continue
Solution Approach 1:
The seed layer is deposited in advance to establish a uniform foundation for metal gate deposition. This preliminary action prevents the formation of uneven gates from the start, eliminating the need for subsequent recessing steps and reducing overall fabrication cycle time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures uniform metal gate deposition, reducing the loading effect and achieving consistent gate lengths, which is essential for the fabrication of vertical field effect transistors.
Implementation Method 1
The seed layer is deposited only on horizontal surfaces using an anisotropic deposition process, so that subsequent deposition of the metal gate is limited to vertical growth.
Implementation Method 2
selective metal gate deposition using anisotropic processes
Data Source
AI summary
Vertical channel field effect transistors and methods of forming the same include forming one or more vertical channels on a bottom source/drain layer. A seed layer is deposited on horizontal surfaces around the one or more vertical channels. A metal gate is deposited on the seed layer. A top source/drain layer is deposited above the one or more vertical channels and the metal gate.