Vertical FET Isolation Pillars for Lower Cell Height
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Solution Overview
Problem
As semiconductor devices scale down, horizontal field-effect transistors face challenges with reduced space for metal gate and source/drain contacts, leading to degraded short-channel control and increased middle-of-the-line resistance, while vertical field-effect transistors aim to address these limitations by decoupling gate length from contact gate pitch but still have undesirable cell heights due to bottom source/drain contacts and gate extensions.
Innovation Solution
The introduction of isolation pillar structures in vertical field-effect transistors allows for the removal of gate extensions and reduction of cell height without changing fin length, improving density and maintaining effective channel width, by using back side source/drain contacts and forming CMOS cells with merged N-FET and P-FET regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If gate extension is added to provide bottom source/drain contact in VFET, then contact access is improved, but cell height increases
Solution Approach 1:
The patent transitions from horizontal gate extension to vertical isolation pillars, changing the dimensional approach to achieve contact access while controlling cell height. The isolation pillars provide the necessary electrical isolation and contact pathways in the vertical dimension rather than extending gates horizontally.
Solution Approach 2:
Instead of extending the gate structure to provide contact access (horizontal approach), the patent inverts the approach by using vertical isolation pillars that extend from the substrate through the fin structure to provide contact access, thereby solving the contradiction between contact accessibility and cell height control.
2Reliability
If isolation structures are added to isolate adjacent VFETs, then device isolation is improved, but device complexity increases
Solution Approach 1:
The isolation pillars serve multiple functions simultaneously: they provide electrical isolation between adjacent VFETs, establish contact pathways for source/drain regions, and define the vertical boundaries of the device structure. This multi-functionality reduces the need for separate isolation structures, thereby managing complexity while improving device isolation.
Solution Approach 2:
The patent merges the isolation function with the contact structure function by integrating the isolation pillars into the same vertical structure that provides contact access. This consolidation eliminates the need for separate isolation and contact structures, improving device isolation while maintaining manageable complexity.
3Productivity
If cell height is reduced to improve density, then integration density is improved, but effective channel width may be reduced
Solution Approach 1:
The patent segments the fin structure into multiple vertical fins within each transistor, allowing the effective channel width to be maintained through the cumulative width of multiple fins while reducing the overall cell height. This segmentation enables high integration density without sacrificing the effective channel width needed for device performance.
Solution Approach 2:
The patent shifts the channel width accumulation from horizontal spacing to vertical stacking of multiple fins, changing the dimensional approach to achieving effective channel width. This allows reduced cell height while maintaining or increasing the effective channel width through the combined width of multiple vertically arranged fins.
Data Source
AI summary
A semiconductor device includes a first vertical field-effect transistor comprising a first set of vertical fins and a second set of vertical fins separated by a first isolation pillar structure. The semiconductor device further includes a second vertical field-effect transistor adjacent to the first vertical field-effect transistor, the second vertical field-effect transistor comprising a first set of vertical fins and a second set of vertical fins separated by a second isolation pillar structure.