Vertical-Transport FET Self-Aligned Contacts via Dielectric Pillars
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Solution Overview
Problem
In semiconductor device fabrication, forming effective contacts for vertical-transport field-effect transistors is challenging due to the vertical direction of current transport, which complicates the integration of gate stacks and contact formation, especially in dividing the gate stack into sections for efficient electrical isolation and contact alignment.
Innovation Solution
A method involving the deposition of a gate stack, an interlayer dielectric layer, and forming pillars made of dielectric material that penetrate through the gate stack to divide it into sections, allowing for the creation of vertically extending contacts that self-align with the gate stack sections, facilitating efficient contact formation and electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate stack is divided into sections for efficient electrical isolation and contact alignment, then the electrical isolation and contact formation efficiency are improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The gate stack is divided into multiple sections by inserting dielectric material pillars between contact openings. This segmentation creates electrically isolated regions that improve electrical isolation between adjacent contacts while maintaining the overall gate functionality. The dielectric pillars act as physical barriers that prevent electrical interference between neighboring gate sections.
Solution Approach 2:
Dielectric material pillars are introduced as intermediary elements between the gate stack sections and contact openings. These pillars serve as mediators that provide both mechanical support and electrical isolation, enabling the gate stack to be divided into functional sections without compromising structural integrity or electrical performance.
2Manufacturing precision
If vertically extending contacts are formed to self-align with gate stack sections, then contact alignment precision is improved, but the manufacturing process complexity increases
Solution Approach 1:
Dielectric material pillars are formed in advance before contact opening formation. These pre-formed pillars serve as alignment references that guide the subsequent contact opening etching process. By establishing the pillar positions first, the contact openings can be precisely aligned to the gate stack sections without requiring complex alignment procedures during later manufacturing steps.
Solution Approach 2:
The dielectric pillars serve as self-aligning features that automatically define the positions of contact openings. The contact openings are formed to align with the pre-existing pillars, allowing the structure itself to guide the alignment process without requiring additional external alignment tools or complex photolithography steps. This self-service approach simplifies the manufacturing process while maintaining high precision.
Data Source
AI summary
Methods of forming contacts for vertical-transport field-effect transistors and structures for a vertical-transport field-effect transistor and contact. An interlayer dielectric layer is deposited over a gate stack, and a first opening is formed in the interlayer dielectric layer and penetrates through the gate stack to cut the gate stack into a first section and a second section. A dielectric pillar is formed in the first opening and is arranged between the first section of the gate stack and the second section of the gate stack. Second and third openings are formed in the interlayer dielectric layer that penetrate to the gate stack and that are divided by the dielectric pillar. A first contact in the second opening is coupled with the first section of the gate stack, and a second contact in the third opening is coupled with the second section of the gate stack.