Vertical FET Source-Down Structure Trench Design
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Solution Overview
Problem
Vertical field-effect transistors (FETs) in source-down structures face challenges in achieving high packing density, particularly when the source terminal needs to be located on the underside of a semiconductor body, as required in applications like automotive industry components that require good cooling.
Innovation Solution
The design incorporates a semiconductor body with trenches of different conduction types filled with doped polycrystalline silicon, where the source terminal is connected to the semiconductor substrate via trenches, allowing for a source-down structure with high packing density by using conductive connections between trenches and insulating layers to position the source on the underside.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the source terminal is located on the underside of the semiconductor body, then good cooling is achieved, but the device structure becomes more complex
Solution Approach 1:
The patent transitions from a planar FET structure to a vertical FET structure, moving the source terminal to the underside (third dimension) of the semiconductor body. This dimensional change enables direct thermal contact with the substrate for improved cooling while maintaining electrical functionality through vertical channel formation.
Solution Approach 2:
The device is segmented into distinct functional regions: source region on the underside, drain region on the top surface, and gate regions positioned vertically. Multiple trenches are segmented and filled with different materials (conductive material for gate, semiconductor material for source/drain extensions) to achieve the source-down configuration.
2Productivity
If vertical FETs are used with source terminal on underside, then packing density increases, but manufacturing complexity increases
Solution Approach 1:
By stacking FETs vertically with source terminals on the underside and drain terminals on the top surface, the patent achieves high packing density in the vertical dimension. Multiple devices can be integrated in a compact footprint by utilizing the vertical space and connecting sources in parallel on the underside.
Solution Approach 2:
Multiple source regions are merged and connected together on the underside of the semiconductor body through a common source electrode. This merging of source terminals simplifies the overall device structure despite the vertical configuration, as multiple FETs share a common source connection point.
3Reliability
If trenches are used to connect zones, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
Trenches filled with conductive material serve as intermediary pathways to establish electrical connections between the source region on the underside and the gate/drain regions on the top surface. These trench structures act as mediators that enable vertical current flow and electrical connectivity without requiring complex external interconnects.
Data Source
AI summary
The invention relates to a vertical field-effect transistor in source-down structure, in which the active zones (10, 7, 11) are introduced from trenches (5, 8, 9) into a semiconductor body (1), a source electrode (18) being connected via the filling (6) of a body trench (5) to a highly doped substrate (2) via a conductive connection (15).