III-Nitride Vertical Field Effect Transistor Design

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current power electronics transistors face challenges in achieving high-voltage operation with low energy loss, high breakdown voltage, robustness, and thermal stability, particularly in applications like solar farms and electric vehicles, due to limitations in materials such as Si, SiC, and III-nitrides, which suffer from defects and inefficiencies in energy band discontinuities and electron mobility.

Innovation Solution

A III-nitride vertical field effect transistor (VFET) design is proposed, featuring a base plate with a mask layer for epitaxial lateral overgrowth, a drain, insulation layer, and source, with a vertical nitride stack forming a conducting channel, allowing electron flow modulation and avoiding defects through optimized growth processes and material doping, enabling high electron mobility and reduced energy loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If conventional transistors (Si IGBTs, SiC transistors) are used to achieve high-voltage operation, then breakdown voltage is improved, but energy loss increases and switching rate decreases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidenergy loss
Core Design Contradiction:
StrengthVSLoss of energy

Solution Approach 1:

The patent employs a composite structure combining III-nitride materials (GaN, AlN, InGaN) with specific hetero-junction configurations. The AlGaN/GaN hetero-junction creates a two-dimensional electron gas (2DEG) channel that enables high electron mobility while maintaining high breakdown voltage capability, thus reducing energy loss compared to conventional Si or SiC transistors

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent implements local quality optimization by creating a vertical field effect transistor structure where the conducting channel is confined to a specific vertical region through hetero-junctions. The 2DEG channel is formed at the AlGaN/GaN interface, providing high electron mobility locally while the overall device maintains high breakdown voltage through the vertical architecture and insulation layers

Inventive Principle:
Principle #3Local quality

2Stability of the object's composition

If III-nitride materials are used to achieve wide band-gap and high thermal conductivity, then thermal stability is improved, but manufacturing complexity increases due to polarization effects and growth difficulties

Engineering Contradiction:
Improvethermal stabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent transitions from conventional planar transistor architecture to a vertical field effect transistor structure. The conducting channel is arranged vertically through hetero-junctions, allowing the device to exploit the high electron mobility of III-nitride materials in a vertical configuration. This dimensional change simplifies the handling of polarization effects compared to planar structures while maintaining thermal stability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs preliminary epitaxial growth techniques to form high-quality III-nitride layers with controlled composition and structure before device fabrication. The hetero-junctions and 2DEG channels are formed during the epitaxial growth process, ensuring proper material quality and reducing subsequent manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

3Speed

If high current density is achieved through 2DEG channels, then electron mobility is improved, but device resistance increases due to aperture formation and current leakage

Engineering Contradiction:
Improveelectron mobilityVSAvoiddevice resistance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent inverts the conventional approach by forming the conducting channel vertically through hetero-junctions rather than horizontally through apertures. This vertical field effect transistor structure eliminates the need for aperture formation that causes current leakage, while maintaining high electron mobility through the 2DEG channel formed at the AlGaN/GaN interface

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The VFET design achieves high current density with low resistance, operates at voltages greater than 650V, and provides stable, normally-off transistor operation with reduced hotspots and leakage currents, making it suitable for high-power applications while allowing for cost-effective industrial-scale production.

Implementation Method 1

a vertical nitride stack grown epitaxially onto the side face of said drain, said insulation layer and said source

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

They are polar materials and have spontaneous polarizations along one direction known as C axis

Methodology Applied
Scientific EffectPolarization: Polarisation

Implementation Method 3

a charge transport channel of a high electron mobility and a two-dimensional electron gas (2DEG)

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10629720B2Layered vertical field effect transistor and methods of fabrication
Publication Date: 2020.04.21 JIANG QUANZHONG
  • US10629720B2 patent drawing
  • US10629720B2 patent drawing
  • US10629720B2 patent drawing

AI summary

A III-nitride vertical field effect transistor comprises a base plate; a mask layer overlaying said base plate and having opening windows for partial exposure of said base plate; a drain grown epitaxially onto regions of said base plate exposed by the opening windows of said mask layer; an insulation layer grown epitaxially onto said drain; a source grown epitaxially onto said insulation layer; a vertical nitride stack grown epitaxially onto the side faces of said drain, said insulation layer and said source, overlaying said mask layer and providing at least one vertical conducting channel to connect said source to said drain; a current flowing from said source to said drain through a conducting channel can be modulated by an electrical voltage that is applied to the side face of said vertical nitride stack. There are preferably also electrodes and edge terms.