Vertical Fin Resistor Integration in FinFET Process Flow
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Solution Overview
Problem
The use of polysilicon resistors in CMOS technologies is not feasible for high-k metal gate process flows, and metallic resistors provide low resistivity and occupy large chip area, while their fabrication requires multiple time-consuming and expensive processing steps.
Innovation Solution
Integration of vertical fin resistor devices with FinFET devices, where vertical semiconductor fins are formed and filled with resistive material to create a compact and efficient resistor structure within the existing FinFET process flow, minimizing additional processing steps and chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If metallic resistors are used, then resistivity is reduced, but chip area occupied increases
Solution Approach 1:
The patent transitions from planar metallic resistors to vertical fin resistor structures that extend in the third dimension (height). By etching fins into the substrate and filling them with resistive material, the resistor achieves higher resistance density per unit chip area, effectively resolving the contradiction between achieving desired resistivity and minimizing footprint.
2Quantity of substance
If conventional metallic resistor fabrication is used, then resistive performance is achieved, but number of processing steps increases
Solution Approach 1:
The patent merges the resistor fabrication process with the existing FinFET manufacturing flow. The vertical fins are formed using the same etching and deposition steps as the transistor fins, and the resistive material filling is integrated into the interlayer dielectric formation process. This consolidation eliminates separate resistor fabrication steps while achieving the desired resistive performance.
3Quantity of substance
If conventional metallic resistor fabrication is used, then resistive performance is achieved, but fabrication time increases
Solution Approach 1:
The vertical fins are formed preliminarily during the FinFET fabrication process before the resistor material is deposited. The fin structures are prepared in advance using standard process steps, and the resistive material is then filled into these pre-formed structures during subsequent processing stages, eliminating the need for separate resistor preparation steps and reducing overall fabrication time.
Data Source
AI summary
Semiconductor devices and methods are provided in which vertical fin resistor devices are integrally formed as part of a process flow for fabricating FinFET (Fin Field Effect Transistor) devices. For example, a semiconductor device includes a FinFET device and a vertical fin resistor device formed on a semiconductor substrate. The FinFET device includes a vertical semiconductor fin which includes a structural profile that is defined by dimensions of width W, height H, and length L. The vertical fin resistor device includes a vertical fin structure which is formed of a resistive material (e.g., polysilicon or amorphous silicon), and which has a structural profile that is defined by dimension of width W1, height H1, and length L1. The structural profiles of the vertical semiconductor fin of the FinFET device and the vertical fin structure of the vertical fin resistor device have at least one corresponding dimension that is substantially the same.