Vertical Fin TFET Structure for Low-Leakage Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) face challenges in reducing threshold voltage while maintaining a high ratio of ON-current to OFF-current, leading to increased energy consumption and reduced performance as transistor size decreases.
Innovation Solution
The development of vertical tunneling field-effect transistors (TFETs) with a fin-based architecture and aspect ratio trapping (ART) technique, which involves fabricating the tunneling junction in trenches to reduce defects and improve scalability, allowing for better control over the channel and reduced leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional MOSFETs are used with reduced threshold voltage, then transistor size can be decreased, but the ratio of ON-current to OFF-current decreases
Solution Approach 1:
The patent transitions from conventional planar MOSFETs to vertical TFETs, changing the current flow direction from lateral to vertical. This dimensional change enables better control of the channel and achieves steeper subthreshold slopes, maintaining high ON/OFF current ratios even at reduced transistor sizes and lower threshold voltages
Solution Approach 2:
The patent changes the transistor type from MOSFET to TFET, fundamentally altering the conduction mechanism from drift-diffusion to band-to-band tunneling. This parameter change enables steeper subthreshold slopes and allows operation at lower threshold voltages while maintaining acceptable ON/OFF current ratios
2Length of moving object
If threshold voltage is reduced in conventional MOSFETs, then transistor size can be decreased, but energy consumption increases
Solution Approach 1:
The vertical architecture with wrap-around gate provides superior electrostatic control, enabling steeper subthreshold slopes. This allows the transistor to switch more efficiently between ON and OFF states, reducing the energy required for switching even at reduced threshold voltages and smaller dimensions
3Ease of manufacture
If lateral TFET structure is used, then fabrication is simpler, but device performance and scalability are limited
Solution Approach 1:
The vertical TFET structure with wrap-around gate enables better electrostatic control and steeper subthreshold slopes, achieving superior device performance. The trench-based fabrication approach with epitaxial growth allows for scalable manufacturing while maintaining high performance characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Vertical TFETs achieve a steeper subthreshold slope, enhancing performance and reducing energy consumption compared to MOSFETs, while offering improved scalability and reduced fabrication complexity.
Implementation Method 1
vertical tunneling field-effect transistors (TFETs)
Data Source
AI summary
Tunneling Field Effect Transistors (TFETs) are promising devices in that they promise significant performance increase and energy consumption decrease due to a steeper subthreshold slope (for example, smaller sub-threshold swing). In various embodiments, vertical fin-based TFETs can be fabricated in trenches, for example, silicon trenches. In another embodiment, vertical TFETs can be used on different material systems acting as a substrate and/or trenches (for example, Si, Ge, III-V semiconductors, GaN, and the like). In one embodiment, the tunneling direction in the channel of the vertical TFET can be perpendicular to the Si substrates. In one embodiment, this can be different than the tunneling direction in the channel of lateral TFETs.