Vertical FinFET Fin Tip Neutralization for Leakage Control
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Solution Overview
Problem
Existing vertical power transistors face issues with high leakage and non-uniformity at fin tips due to varying regrowth characteristics and etching processes, leading to increased gate-source junction leakage and electrical variations.
Innovation Solution
The method involves forming a vertical FinFET device with neutralized fin tips by implanting ions or using hydrogen plasma treatment to reduce the electrical conductivity of the fin tips and gate regions, thereby reducing leakage and improving uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional vertical power transistors are fabricated using standard etching and regrowth processes, then device fabrication is simplified, but gate-source junction leakage increases and electrical uniformity deteriorates due to varying regrowth characteristics at fin tips
Solution Approach 1:
The patent applies preliminary action by performing ion implantation or hydrogen plasma treatment on the fin tips before the main regrowth process. This pre-treatment modifies the fin tip regions to have reduced electrical conductivity, preventing the formation of high-leakage paths during subsequent regrowth. The fin tips are prepared in advance with neutralized conductivity, ensuring uniform electrical characteristics throughout the device structure.
Solution Approach 2:
The patent implements local quality by applying different treatments to different regions of the fin structure. The fin tips receive ion implantation or hydrogen plasma treatment to reduce their electrical conductivity, while the central regions maintain their original conductivity characteristics. This spatial differentiation of material properties ensures that fin tips do not create leakage paths, while central regions provide efficient current conduction.
2Manufacturing precision
If standard regrowth processes are used without fin tip neutralization, then manufacturing process is simpler, but electrical conductivity uniformity across the device deteriorates
Solution Approach 1:
The patent applies parameter changes by modifying the electrical conductivity parameter of the fin tip regions through ion implantation or hydrogen plasma treatment. This changes the physical state of the fin tip material, creating a localized reduction in conductivity that compensates for the naturally higher conductivity at fin tips. The parameter modification ensures uniform electrical characteristics across the entire device structure.
3Loss of energy
If fin tips are not neutralized, then device fabrication is easier, but power dissipation increases due to leakage currents
Solution Approach 1:
The patent applies preliminary action by performing ion implantation or hydrogen plasma treatment on the fin tips before the main regrowth process. This pre-treatment modifies the fin tip regions to have reduced electrical conductivity, preventing the formation of high-leakage paths during subsequent regrowth. The fin tips are prepared in advance with neutralized conductivity, ensuring uniform electrical characteristics throughout the device structure.
Solution Approach 2:
The patent implements local quality by applying different treatments to different regions of the fin structure. The fin tips receive ion implantation or hydrogen plasma treatment to reduce their electrical conductivity, while the central regions maintain their original conductivity characteristics. This spatial differentiation of material properties ensures that fin tips do not create leakage paths, while central regions provide efficient current conduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces gate-source junction leakage and electrical conductivity variations, enhancing the performance and reliability of vertical power transistors by minimizing power dissipation and improving switching efficiency.
Implementation Method 1
forming the first fin tip and the second fin tip to have second electrical conductivity can be achieved using implantation of ions
Implementation Method 2
the second electrical conductivity can be achieved using a hydrogen plasma treatment
Data Source
AI summary
A vertical fin-based field effect transistor (FinFET) device includes an array of FinFETs comprising a plurality of rows and columns of separated fins. Each of the separated fins has a length and a width measured laterally with respect to the length and includes a first fin tip disposed at a first end of the separated fin, a second fin tip disposed at a second end of the separated fin opposing the first end, a central region disposed between the first fin tip and the second fin tip and characterized by a first electrical conductivity, and a source contact electrically coupled to the central region. The first fin tip and the second fin tip are characterized by a second electrical conductivity less than the first electrical conductivity. The FinFET further includes a first gate region surrounding the first fin tip and a second gate region surrounding the second fin tip.