Vertical GaN HEMT Structure With Lateral Resistive Field Shaping

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Solution Overview

Problem

Existing nitride semiconductor structures face challenges in achieving high power, high voltage, and high-speed operation, particularly in vertical high-electron mobility transistors (HEMTs).

Innovation Solution

A method involving a semiconductor structure with a conductive GaN layer etched to form a vertical structure, surrounded by resistive material, and epitaxially grown laterally, combined with heterojunctions to facilitate efficient current flow and uniform electric field distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If nitride semiconductor structures are used for high power and high voltage operation, then power and voltage capabilities are improved, but manufacturing complexity and process difficulty increase

Engineering Contradiction:
Improvepower capabilityVSAvoidstructure complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The semiconductor structure is divided into multiple functional layers including AlN buffer layer, AlGaN barrier layer, GaN conductive layer, and GaN resistive layer, each serving specific purposes. This segmentation allows optimization of each layer independently for high power operation while managing the overall structural complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the structure have different properties: the GaN conductive layer has high electron mobility for current transport, while the GaN resistive layer has controlled resistance for electric field management. This local differentiation enables high power capability without requiring uniform complex structures throughout

Inventive Principle:
Principle #3Local quality

2Speed

If vertical HEMT structure is implemented for high-speed operation, then speed capability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveoperation speedVSAvoidinterface quality
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

An AlN buffer layer is deposited first to prepare the substrate surface, followed by AlGaN barrier layer with specific aluminum content to pre-establish the heterojunction interface. This preliminary structuring creates optimal conditions for subsequent GaN layer deposition, ensuring high interface quality without requiring extreme precision in later steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The structure uses composite AlGaN/GaN heterojunctions where the aluminum gallium nitride layer with controlled aluminum content (x≥0) forms a heterointerface with GaN layer. This composite material approach enables high electron mobility for fast operation while the material system itself provides tolerance to manufacturing variations

Inventive Principle:
Principle #40Composite materials

3Speed

If conductive GaN layer is etched to form vertical structure, then electron mobility is improved, but loss of material and increased process steps occur

Engineering Contradiction:
Improveelectron mobilityVSAvoidGaN material loss
Core Design Contradiction:
SpeedVSLoss of substance

Solution Approach 1:

The conductive GaN layer is selectively etched to extract and form vertical conductive structures (such as vertical channels or fins). This extraction creates the necessary geometry for high electron mobility while removing only the minimum required material, preserving bulk GaN for other functions

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

A mask layer is introduced as an intermediary element to control the etching process. The mask protects regions where GaN should be retained while allowing etching in conductive regions, thereby achieving the desired vertical structures with minimal material loss and without requiring additional GaN deposition steps

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If resistive material is grown laterally surrounding vertical conductive structure, then electric field distribution is improved, but process time and complexity increase

Engineering Contradiction:
Improveelectric field distributionVSAvoidprocess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The resistive GaN layer is grown laterally to surround the vertical conductive GaN structures, merging the conductive and resistive functions into a single integrated structure. This combined architecture provides uniform electric field distribution without requiring separate field management components, reducing overall process time

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The resistive material is grown in a lateral direction rather than vertically, creating a three-dimensional structure where resistive regions surround conductive regions. This dimensional approach enables electric field control through geometric configuration rather than through additional process steps, reducing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the production of vertical HEMTs with high power, voltage, and speed capabilities, reducing transistor losses and enhancing electron mobility through high-quality interfaces and controlled electric field distribution.

Implementation Method 1

removing, by etching, unmasked parts of the conductive GaN layer to form a vertical conductive GaN structure from the conductive GaN layer

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

epitaxially growing resistive material, the resistive material laterally surrounding the vertical conductive GaN structure, such that a third layer is formed

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentEP4614549A1A semiconductor structure and a method to produce a semiconductor structure
Publication Date: 2025.09.10 EPINOVATECH AB
  • EP4614549A1 patent drawingFigure 1a
  • EP4614549A1 patent drawingFigure 1b
  • EP4614549A1 patent drawingFigure 1c

AI summary

A semiconductor structure comprising: a substrate; a first layer arranged on top of the substrate, the first layer comprising at least one AIN layer; a second layer arranged on top of the first layer, the second layer comprising alternate AIN and GaN layers; a third layer arranged on top of the second layer, the third layer comprising at least one vertical conductive GaN structure laterally surrounded by resistive material, the resistive material comprising gallium and a method to producing a semiconductor structure.