Vertical GaN JFET Edge Termination Rings
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Solution Overview
Problem
Conventional power electronics face limitations in operating at high voltages and low resistance due to defects in edge termination structures, particularly when using foreign substrates like silicon carbide for gallium-nitride (GaN) layers, which restrict layer thickness and increase defect densities.
Innovation Solution
The use of gallium-nitride (GaN) epitaxy on pseudo-bulk GaN substrates to fabricate vertical power devices with edge termination structures, including continuous gate regions and concentric edge termination rings, which surround low-voltage areas to enhance breakdown voltage and reduce device size and processing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If foreign substrates like silicon carbide are used for GaN layers, then device fabrication is enabled, but defect densities increase and layer thickness is restricted
Solution Approach 1:
The patent uses pseudo-bulk GaN substrates that are homoepitaxial (same material system), creating a homogeneous interface between substrate and GaN layers. This eliminates the lattice mismatch and thermal expansion coefficient differences that cause defects when using foreign substrates like silicon carbide, thereby reducing defect densities while enabling device fabrication.
Solution Approach 2:
The patent employs a composite structure consisting of a pseudo-bulk GaN substrate combined with epitaxially grown GaN layers. This composite material approach allows the substrate to provide mechanical support while the epitaxial layers provide the functional semiconductor properties, achieving both manufacturability and high reliability through reduced defects.
2Ease of manufacture
If conventional edge termination structures are used, then device fabrication is simplified, but breakdown voltage is limited and device size increases
Solution Approach 1:
The patent implements concentric edge termination rings nested within each other, with each ring having progressively different doping concentrations. This nested structure creates a gradual transition of electric field distribution at the device edges, enabling higher breakdown voltages while maintaining a compact footprint and simplifying the fabrication process through sequential ring formation.
Data Source
AI summary
A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.


