Vertical MOSFET Gate Stack With High-k Spacer Leakage Control
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Solution Overview
Problem
As semiconductor devices are scaled down, their operating characteristics deteriorate due to high integration, leading to challenges in achieving superior performance and reliability.
Innovation Solution
A semiconductor device design featuring vertically stacked semiconductor patterns with an inner gate electrode, high-k dielectric layers, and spacers, along with a specific lattice structure and epitaxial source/drain patterns, is implemented to enhance electrical properties and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFET sizes are scaled down to increase integration, then device density increases, but operating characteristics deteriorate
Solution Approach 1:
The patent transitions from planar 2D channel structures to three-dimensional vertically stacked channel patterns. Multiple semiconductor patterns are stacked in the vertical direction to form multi-layer channel structures, enabling increased device density without further lateral scaling. This dimensional change allows the device to maintain electrical characteristics while achieving higher integration by utilizing the vertical dimension for additional transistor layers.
2Reliability
If high-k dielectric layers are added to control capacitance, then electrical properties improve, but device complexity increases
Solution Approach 1:
The gate dielectric structure employs a composite configuration combining high-k dielectric layers with conventional dielectric materials. The high-k dielectric layer is positioned adjacent to the semiconductor channel to maximize capacitance control and electrical field effect, while conventional dielectric layers are used in other regions. This composite approach optimizes electrical properties through the high-k material's superior dielectric constant while managing overall device complexity through strategic material placement and functional differentiation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the electrical properties and reliability of semiconductor devices by controlling capacitance and reducing leakage currents, thereby optimizing device performance.
Implementation Method 1
an inner spacer between the inner gate electrode and the source/drain pattern... controlling capacitance and reducing leakage currents
Implementation Method 2
inner high-k dielectric layer between the inner gate electrode and the inner gate dielectric layer... reducing leakage currents
Data Source
AI summary
The present disclosure relates to semiconductor devices and their fabrication methods. An example semiconductor device comprises a substrate including an active pattern, a channel pattern including semiconductor patterns, a source/drain pattern connected to the semiconductor patterns, an inner gate electrode between two neighboring semiconductor patterns, an inner gate dielectric layer, and an inner high-k dielectric layer between the inner gate electrode and the inner gate dielectric layer. The inner gate dielectric layer includes an upper dielectric layer, a lower dielectric layer, and an inner spacer. A first thickness of the inner spacer is greater than a second thickness of the upper or lower dielectric layer. The first thickness is greater than a third thickness of the inner high-k dielectric layer.