Vertical Graphene Interconnects for Gap-Free BEOL Conduction
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Solution Overview
Problem
Current semiconductor interconnect structures face challenges in miniaturization and electrical performance due to limitations in forming reliable and conductive pathways within small dimensions, particularly in the back-end-of-line (BEOL) interconnects, where traditional methods struggle with gap-fill issues and high resistance at reduced device scales.
Innovation Solution
The formation of a graphene conductive structure within interconnect openings, where graphene layers are directly grown parallel to the inner lateral surface of the dielectric layer, providing a robust and durable electric conduction path without gaps and minimizing resistance, and allowing for efficient doping or intercalation to enhance conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional interconnect structures are used for miniaturization, then device dimensions are reduced, but gap-fill issues and high resistance occur
Solution Approach 1:
The patent changes the material parameter from traditional metals to graphene, which has fundamentally different physical properties including superior electrical conductivity and flexibility. This parameter change enables gap-free filling in miniaturized interconnect structures while maintaining low resistance, directly resolving the contradiction between device miniaturization and gap-fill reliability
Solution Approach 2:
The patent employs graphene as a composite material within the interconnect structure, combining it with dielectric materials to create a hybrid system. The graphene layers provide exceptional electrical conductivity and gap-free coverage, while the dielectric materials provide structural support, together achieving reliable miniaturized interconnects without the gap-fill issues of traditional single-material approaches
2Length of moving object
If traditional conductive materials are used in reduced dimensions, then interconnect size is reduced, but electrical resistance increases
Solution Approach 1:
The patent changes the electrical conductivity parameter by substituting traditional metals with graphene, which possesses inherently superior electrical conductivity with lower resistivity. This material parameter change ensures that even as interconnect dimensions are reduced, the electrical resistance remains low due to graphene's exceptional charge carrier mobility and conductivity properties
Solution Approach 2:
The patent replaces the conventional metal-based conductive system with a graphene-based two-dimensional material system. This substitution leverages the unique electronic structure and ballistic transport properties of graphene to achieve superior electrical conductivity in reduced dimensions, overcoming the resistance increase that plagues traditional materials at nanoscale dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of reliable, gap-free interconnects with improved electrical conductivity, addressing the limitations of traditional methods by providing a durable and efficient conductive pathway that maintains performance even at reduced device dimensions.
Implementation Method 1
a graphene conductive structure is directly grown in the interconnect opening from the metal layer
Implementation Method 2
the graphene conductive structure fills the interconnect opening, is electrically connected to the contact feature
Data Source
AI summary
A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.