Vertical Half-Bridge Semiconductor Package for Smaller PCB Footprint
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor packages with increased functionality require a smaller footprint on circuit boards to minimize space occupation and reduce parasitic inductance and power losses, while maintaining efficient power management and thermal management.
Innovation Solution
A semiconductor package with a vertical mounting arrangement featuring a half-bridge circuit and control devices, including gate driver circuitry, is designed with low voltage, high voltage, and output contact pads on a lower surface perpendicular to the transistor devices' major surfaces, allowing for a reduced footprint and improved integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If semiconductor devices are mounted in a conventional horizontal arrangement, then the package structure is simple and easy to manufacture, but the occupied board space is large
Solution Approach 1:
The patent transitions from a conventional horizontal mounting arrangement to a vertical mounting arrangement, changing the spatial dimension of device placement. The first and second semiconductor devices are mounted on opposite sides of the substrate vertically, with their front surfaces facing opposite directions. This dimensional change reduces the occupied board space while maintaining electrical connectivity through the substrate's internal wiring.
2Area of stationary object
If the package footprint is reduced, then space occupation is minimized, but parasitic inductance and power losses increase
Solution Approach 1:
The patent applies local quality by creating asymmetric device configurations and positioning devices at different heights relative to the substrate. The first semiconductor device is mounted on one side of the substrate while the second semiconductor device is mounted on the opposite side, allowing optimized local electrical pathways that reduce parasitic inductance despite the reduced overall footprint.
3Area of stationary object
If semiconductor devices are arranged vertically, then the occupied board space is reduced, but thermal management becomes more challenging
Solution Approach 1:
The patent segments the thermal management approach by mounting semiconductor devices on opposite sides of the substrate, allowing heat to be dissipated in different directions. This segmentation enables independent thermal management for each device, with heat sinking structures that extend from the substrate to manage thermal loads effectively in the vertical configuration.
Data Source
AI summary
In an embodiment, a semiconductor package includes a lower surface having a low voltage contact pad, a high voltage contact pad, an output contact pad, and at least one control contact pad. The semiconductor package further includes a half-bridge circuit including a first transistor device having a first major surface and a second transistor device having a first major surface, the first and second transistor devices being electrically coupled in series at an output node, and a control device that is electrically coupled to the first transistor device and the second transistor device. The first major surface of the first transistor device and of the second transistor device are arranged substantially perpendicularly to the lower surface of the semiconductor package.