Vertical Hall Device Resistance Balancing via P+ Stripes
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Solution Overview
Problem
Existing vertical Hall devices fabricated using CMOS technology face challenges in meeting requirements of low offset, low flicker noise, and equal resistance values between contacts, due to limitations in design rules and material quality, leading to suboptimal performance as magnetic sensors.
Innovation Solution
The design introduces a novel layout for four- and five-contact vertical Hall devices with non-uniform effective widths and the use of P+ stripes between contacts to equate resistances and enhance magnetic sensitivity, breaking the conventional two-dimensional structure to achieve three-dimensional active zones, thereby reducing resistance imbalances and improving sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional two-dimensional layout is used for vertical Hall device, then fabrication is simple, but resistance imbalance between contacts occurs and sensitivity is reduced
Solution Approach 1:
The patent transitions from a conventional two-dimensional planar layout to a three-dimensional vertical structure by creating active zones at different depths (first active zone at deeper level, second active zone at shallower level). This dimensional change allows the formation of multiple contacts (first contacts and second contacts) at different vertical positions, enabling resistance balancing while maintaining fabrication simplicity through standard CMOS processes.
2Manufacturing precision
If uniform width structure is used, then fabrication is easy, but magnetic sensitivity is reduced
Solution Approach 1:
The patent implements non-uniform width distribution across different regions of the Hall device. Specifically, the first contacts and second contacts are positioned at different vertical levels with optimized width characteristics locally adapted to their position. The first active zone and second active zone have different dimensional characteristics tailored to their respective depths, achieving enhanced magnetic sensitivity while using standard fabrication processes.
3Manufacturing precision
If standard CMOS fabrication is used, then manufacturing cost is low, but resistance balance and sensitivity requirements are difficult to meet
Solution Approach 1:
The patent achieves multiple functions within a single fabrication process: the vertical structure simultaneously provides resistance balancing between contacts, enhances magnetic sensitivity through optimized active zones, and maintains compatibility with standard CMOS technology. The same fabrication process creates both the vertical stratification for sensitivity and the contact geometry for resistance balance, eliminating the need for additional specialized fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces resistance imbalances and enhances voltage-related magnetic sensitivity, allowing the vertical Hall devices to meet all performance requirements while being fabricated within existing CMOS technology without additional fabrication steps.
Implementation Method 1
A Hall-effect device, or Hall device in short, also known as a Hall element or Hall sensor, is a device that converts the component to be measured of a magnetic field vector into a voltage. If the Hall device 1 is exposed to a magnetic field having a component perpendicular to the effective device plane, then the electromotive force of the Hall effect acts between the output terminals.
Data Source
Figure 1~2
Figure 3~4
Figure 5a~6
AI summary
A vertical Hall device (1) has a deep N-well (NW), two inner contacts (5, 6), two outer contacts (4, 7) and, optionally, a central contact (12) disposed at a surface of the deep N-well (NW) and arranged along a straight symmetry line (8). The vertical Hall device (1) is designed according to the invention to have either an effective width of the outer contacts (4, 7) that is bigger than an effective width of the inner contacts (5, 6) and/or a shallow highly doped P+ stripe disposed between the inner contacts (5, 6) or between each of the inner contacts (5, 6) and the central contact (12). These measures help to balance the resistances of the Wheatstone bridge which describes the electrical characteristics of the vertical Hall device.