Vertical Heat Conduction Elements in Chip Packaging

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Solution Overview

Problem

Existing chip packaging methods face challenges in effective heat dissipation due to long heat dissipation paths, poor manufacturing complexity, and size limitations, particularly with the use of metal caps that hinder thermal efficiency and complicate manufacturing processes.

Innovation Solution

A chip packaging method involving a base material with finger contacts, surrounded by vertical heat conduction elements and encapsulated in a package material, with a metal film adhered via an adhesive layer to form a structure that enhances heat transfer without the need for complex manufacturing or size-restricted metal caps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a metal cap is provided over the conductive film to strengthen electromagnetic protection, then electromagnetic interference resistance is improved, but heat dissipation performance deteriorates because heat accumulates inside the metal cap

Engineering Contradiction:
Improveelectromagnetic interference resistanceVSAvoidheat dissipation performance
Core Design Contradiction:
Object-affected harmful factorsVSTemperature

Solution Approach 1:

The invention removes the metal cap from the package structure, extracting the harmful thermal accumulation effect while preserving electromagnetic protection through alternative means (package material with appropriate properties and grounding arrangements), thereby resolving the contradiction between electromagnetic protection and heat dissipation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention introduces vertical heat conduction elements that extend heat dissipation paths in the vertical dimension, allowing heat to be conducted away from the chip through multiple pathways including upward conduction, thus improving heat dissipation without compromising electromagnetic protection

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If the substrate is formed with an open space and metal film is disposed on package material to enhance heat dissipation, then heat dissipation performance is improved, but manufacturing complexity increases due to multiple steps including etching, positioning, heating, and press

Engineering Contradiction:
Improveheat dissipation performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The invention combines the heat dissipation function with the package material itself and the vertical heat conduction elements, merging multiple functions into a unified structure that achieves effective heat dissipation through thermal contact between the chip, vertical heat conduction elements, and package material, thereby reducing manufacturing complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The package material serves multiple functions: it provides structural support, electrical insulation, and thermal conduction pathways through the vertical heat conduction elements, eliminating the need for separate complex heat dissipation structures and reducing overall manufacturing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Temperature

If a metal cap with complicated shape is attached on the chip for heat dissipation, then heat conduction is improved, but manufacturing difficulty increases and minimum size limitation arises that is not suitable for small-sized chip packages

Engineering Contradiction:
Improveheat conduction efficiencyVSAvoidmanufacturing ease
Core Design Contradiction:
TemperatureVSEase of manufacture

Solution Approach 1:

The invention replaces rigid metal caps with thin film metal layers adhered to the package material, which can be easily manufactured using standard thin film deposition techniques and can be scaled to any chip size without minimum size limitations, thereby improving manufacturing ease while maintaining heat conduction efficiency

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The invention transitions from three-dimensional metal cap structures to two-dimensional thin film structures, enabling easier manufacturing and scaling to small chip sizes while maintaining effective thermal contact through the vertical heat conduction elements

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies manufacturing, reduces costs, and provides efficient heat dissipation across various chip sizes by creating a high thermal contact area between the chip, base material, and metal film, improving heat distribution and reducing concentration.

Implementation Method 1

the plural vertical heat conduction elements make thermal contacts with both of the base material and the metal film

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentUS11469162B2Plurality of vertical heat conduction elements attached to metal film
Publication Date: 2022.10.11 RICHTEK TECH
  • US11469162B2 patent drawing
  • US11469162B2 patent drawing
  • US11469162B2 patent drawing

AI summary

The present invention provides a chip packaging method, which includes: providing a base material, which includes plural finger contacts; disposing plural chips on the base material by flip chip mounting technology, and disposing plural vertical heat conducting elements surrounding each of the chips to connect the finger contacts on the base material; providing a packaging material to encapsulate the base material, the chips, and the vertical heat conducting elements; adhering a metal film on the packaging material via an adhesive layer, to form a package structure; and cutting the package structure into plural chip package units, wherein each of the chip package units includes one of the chips, a portion of the base material, a portion of the metal film, and a portion of the vertical heat conducting elements surrounding the chip.