Vertical Heterojunction Nitride Structure for High-Aspect-Ratio Channels

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Solution Overview

Problem

Existing nitride semiconductor devices have defects that restrict their application ranges due to limitations in manufacturing high aspect ratio structures.

Innovation Solution

A semiconductor device is designed with a groove structure that includes a first channel layer and a first barrier layer, forming a vertical heterojunction with a 2DEG or 2DHG, and additional layers and electrodes for enhanced performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional manufacturing methods are used for nitride semiconductor devices, then the manufacturing process is simple, but the device aspect ratio is limited and cannot achieve high aspect ratio structures

Engineering Contradiction:
Improvedevice aspect ratioVSAvoidmanufacturing complexity
Core Design Contradiction:
Length of moving objectVSEase of manufacture

Solution Approach 1:

The patent transitions from conventional planar (2D) semiconductor structures to vertical (3D) groove-based structures. By etching grooves into the substrate and growing nitride semiconductor layers vertically within these grooves, the device achieves high aspect ratio configurations that cannot be obtained through traditional planar manufacturing methods. This dimensional change enables the channel length to be much greater than the device width, creating high aspect ratio structures essential for improved device performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If high aspect ratio structures are manufactured, then device conductivity and response speed improve, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedevice conductivityVSAvoidgroove formation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent employs preliminary actions in several critical steps: First, grooves are pre-formed in the substrate with precise dimensions before any semiconductor layers are deposited. Second, a nucleation layer is grown on the groove walls to prepare the surface for subsequent epitaxial growth. Third, sacrificial layers are deposited on groove walls to control the final groove geometry. These preliminary actions ensure that the high aspect ratio structures are formed with the required precision and that the vertical interfaces between layers are well-defined, enabling high conductivity and fast response.

Inventive Principle:
Principle #10Preliminary action

3Speed

If vertical heterojunctions with 2DEG/2DHG are formed, then device response speed increases, but device complexity increases

Engineering Contradiction:
Improvedevice response speedVSAvoidlayer structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the nitride semiconductor device into distinct functional layers with specific compositions and thicknesses. The structure includes alternating layers of AlGaN (barrier layers) and GaN (channel layers), each with controlled aluminum content and thickness. This segmentation creates multiple vertical heterojunctions that generate 2DEG or 2DHG at each interface. The segmented structure allows independent optimization of each layer's properties to achieve high response speed while managing overall device complexity through systematic design.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The groove structure enables the formation of high aspect ratio devices with improved conductivity and response speed, overcoming traditional manufacturing limitations and enhancing device performance.

Implementation Method 1

Polar semiconductors have many unique properties. Particularly importantly, fixed polarized charges are present at a surface of the polar semiconductor or at an interface of two different polar semiconductors. These fixed polarized charges may attract movable electrons or hole carriers and thus form the two-dimensional electron gas (2DEG) or the two-dimensional hole gas (2DHG).

Methodology Applied
Scientific EffectPolarization: Polarisation

Data Source

PatentUS12302598B2Semiconductor device and method of manufacturing the same
Publication Date: 2025.05.13 GUANGDONG ZHINENG TECH CO LTD
  • US12302598B2 patent drawing
  • US12302598B2 patent drawing
  • US12302598B2 patent drawing

AI summary

The present disclosure relates to a semiconductor device, comprising: a groove; a first channel layer positioned within the groove; and a first barrier layer positioned within the groove, wherein a first heterojunction having a vertical interface is included between the first channel layer and the first barrier layer and 2DEG or 2DHG is formed in the first heterojunction. The present disclosure also relates to a method of manufacturing a semiconductor device.