Vertical Hole Etching Using Selective Material Layer Removal
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Solution Overview
Problem
Current methods for manufacturing three-dimensional semiconductor devices face challenges in forming vertical structures with vertical surfaces that are difficult to achieve due to manufacturing process limitations, leading to non-vertical inclinations and width variations in vertical holes and channels.
Innovation Solution
A method involving the formation of multi-layered stacks with different etch rates, where specific material layers are patterned and etched using etch masks to create vertical holes and channels, allowing for the exposure and removal of underlying layers, enabling the formation of vertical plugs and memory structures with precise control over etch processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to form vertical holes, then the manufacturing process is simple, but the vertical surfaces cannot be achieved due to manufacturing process limitations, resulting in non-vertical inclinations and width variations
Solution Approach 1:
The patent divides the etching process into multiple sequential steps, each targeting specific material layers with different etch rates. The multi-layered stack structure is segmented into distinct layers (first material layer, second material layer, third material layer) that are etched in a controlled sequence, allowing precise formation of vertical surfaces through staged removal of materials rather than a single etching operation
Solution Approach 2:
The patent applies different etching conditions and selectivities to different local regions and material layers. Each material layer has specific etch rate characteristics that are exploited to achieve vertical profiles in specific zones. The etch masks are selectively applied to different areas to control local etching behavior, ensuring vertical surfaces are formed where needed while maintaining process control
2Manufacturing precision
If multi-layered stacks with different etch rates are formed and etched using etch masks, then vertical structures with precise control are achieved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent performs preliminary formation of the multi-layered stack structure with carefully selected materials having different etch rates before the actual etching process. Etch masks are prepared and positioned in advance on specific layers. This preliminary preparation ensures that when etching occurs, the vertical profiles are achieved through pre-established material properties and mask configurations, reducing the need for complex real-time process control
Solution Approach 2:
The patent exploits changes in etch rate parameters across different material layers to achieve vertical etching profiles. By selecting materials with progressively different etch rates and using selective etching conditions, the process transforms the etching behavior from non-vertical to vertical through parameter control. The etch selectivity between layers is adjusted to maintain vertical sidewalls during the etching process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the efficient and accurate formation of 3D semiconductor devices with vertical structures, enhancing integration density and enabling the creation of high-capacity memory blocks, such as those found in flash memory devices.
Implementation Method 1
patterning the second material layer exposed by the first opening using a difference in an etch rate between the first material layer and the second material layer
Data Source
AI summary
Disclosed is a method of manufacturing a semiconductor device, including: forming a multi-layered stack; forming a vertical hole in the stack; forming a plurality of material layers over a bottom and a sidewall of the vertical hole, wherein the plurality of material layers includes a first material layer and a second material layer, wherein the second material layer is provided under the first material layer; patterning the first material layer located over the bottom of the vertical hole to form a first opening, wherein the first opening exposes the second material layer; and patterning the second material layer exposed by the first opening using a difference in an etch rate between the first material layer and the second material layer.