Vertical Hybrid Transistor Structure for Low-Leakage Memory Cells
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Solution Overview
Problem
Conventional volatile memory cells experience sub-threshold leakage current, leading to charge discharge over time, which requires frequent refreshing and affects the design and fabrication of memory devices.
Innovation Solution
The design and fabrication of hybrid transistors with a channel region made from a high bandgap low mobility material and source/drain regions made from a low bandgap high mobility material, which reduces gate-induced drain leakage and improves contact resistance and on-current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a uniform semiconductor material is used for the channel region, then the on-current is improved, but the off-state leakage current increases
Solution Approach 1:
The patent applies local quality by using different semiconductor materials with different bandgaps in different regions of the transistor. Specifically, the channel region uses a first semiconductor material with a first bandgap optimized for low leakage, while the source and drain regions use a second semiconductor material with a second bandgap optimized for high carrier injection. This spatial differentiation of material properties resolves the contradiction between achieving high on-current and minimizing off-state leakage.
Solution Approach 2:
The patent employs composite materials by combining two different semiconductor materials with distinct bandgap characteristics. The hybrid structure integrates a wide-bandgap material in the channel for leakage suppression and a narrow-bandgap material in the source/drain for efficient carrier supply, thereby simultaneously achieving low off-state leakage and high on-current through material composition optimization.
2Object-generated harmful factors
If a high bandgap material is used in the channel region, then the off-state leakage current is reduced, but the contact resistance increases
Solution Approach 1:
The patent resolves the contact resistance issue by applying local quality - using a wide-bandgap material specifically in the channel region where low leakage is critical, while using a narrow-bandgap material in the source and drain regions where efficient carrier injection and low contact resistance are essential. This localized material optimization ensures that each region's material properties match its functional requirements.
Solution Approach 2:
The hybrid transistor structure uses composite materials to balance leakage reduction and contact resistance. The combination of wide-bandgap channel material and narrow-bandgap source/drain material creates a system where the wide-bandgap region suppresses leakage without compromising overall device performance, as the narrow-bandgap source/drain regions provide efficient carrier supply and maintain low contact resistance.
3Object-generated harmful factors
If a uniform oxide semiconductor channel is used, then the sub-threshold leakage current is reduced, but the on-current and mobility are limited
Solution Approach 1:
The patent overcomes the mobility and on-current limitations of uniform oxide semiconductor channels by applying local quality - using oxide semiconductor material with high bandgap specifically in the channel region for leakage suppression, while using conventional semiconductor material with high carrier mobility in the source and drain regions for efficient carrier injection. This spatial differentiation allows each region to optimize for its primary function.
Solution Approach 2:
The hybrid structure combines oxide semiconductor material and conventional semiconductor material to achieve both low leakage and high on-current. The oxide semiconductor channel provides excellent leakage characteristics, while the conventional semiconductor source/drain regions provide high carrier mobility and efficient carrier supply, resulting in a device that simultaneously achieves low sub-threshold leakage and high on-current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid transistor configuration effectively minimizes off-state leakage current while maintaining high on-state current, thereby reducing the need for frequent refreshing and enhancing the performance and efficiency of memory devices.
Implementation Method 1
a channel region made from a high bandgap low mobility material
Implementation Method 2
source/drain regions made from a low bandgap high mobility material
Data Source
AI summary
Semiconductor devices are disclosed. A semiconductor device may include a hybrid transistor configured in a vertical orientation. The hybrid transistor may include a gate electrode, a drain material, a source material, and a channel material operatively coupled between the drain material and the source material. The source material and the drain material include a first material and the channel material includes a second, different material.