Vertical IC Chip Connector for Direct Mounting and Heat Dissipation
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Solution Overview
Problem
Conventional integrated circuit (IC) chip packaging technologies, such as flat no-leads packages, face limitations in efficiently connecting IC chips to substrates and external components, particularly in terms of heat dissipation and space utilization, as they rely on surface-mount technologies that do not effectively utilize vertical connections.
Innovation Solution
The integration of a vertical wire extending through the encapsulating material of the IC chip, forming a vertical connector that can be coupled to the interconnect on the die, allowing for direct connection of external components without the need for intermediate substrates and enabling improved heat transfer and space-efficient chip stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If flat no-leads package technology is used to connect IC chips to substrates, then the package provides protection and heat dissipation, but the connection efficiency and space utilization are limited due to reliance on surface-mount technology without vertical connections
Solution Approach 1:
The patent introduces vertical wire connections that extend through the encapsulating material from the bottom surface to the top surface of the IC chip, adding a vertical dimension to the traditional planar surface-mount connections. This enables three-dimensional interconnection architecture, allowing components to be mounted on both surfaces of the chip, thereby improving connection efficiency and space utilization without significantly increasing package structural complexity
2Temperature
If conventional surface-mount technology is used, then the IC chip can be connected to substrates, but heat dissipation efficiency is insufficient due to lack of direct vertical thermal paths
Solution Approach 1:
The vertical wire connections serve dual functions: electrical interconnection between the die and external components, and thermal conduction path from the die to the heat sink or cooling structures on the opposite surface. By making the wire bonds multi-functional (both electrical and thermal), the patent improves heat dissipation efficiency without adding separate dedicated thermal pathways, thus maintaining ease of manufacture
3Area of stationary object
If intermediate substrates are used for connecting IC chips to external components, then reliable electrical connections are achieved, but space utilization is reduced and manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates the intermediate substrate layer from the interconnection architecture by implementing direct vertical wire bonds from the die through the encapsulating material to external components mounted on the chip surfaces. This removal of the intermediate substrate reduces the overall package area, improves space utilization, and lowers manufacturing costs while maintaining electrical connection reliability through the direct wire bond pathways
4Productivity
If vertical wire connectors are integrated through the encapsulating material, then direct mounting of components is enabled and space is utilized more efficiently, but the manufacturing process becomes more complex
Solution Approach 1:
The vertical wire connections are established during the encapsulation process itself, before final component mounting. The wire bonds are formed extending through the encapsulating material in advance, and the external components are subsequently mounted directly to these pre-positioned vertical connectors. This preliminary formation of connection pathways streamlines the overall manufacturing process, improving productivity without requiring complex post-encapsulation wire bonding operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances heat dissipation and space utilization by allowing direct mounting of components on the IC chip, reducing the need for costly substrates and enabling efficient current paths for high-power connections, while also simplifying the manufacturing process by eliminating the need for etching and grinding.
Implementation Method 1
a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.
Implementation Method 2
Heat transfer can be further facilitated by metal vias in the thermal pad
Data Source
AI summary
An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.