Vertical IGZO TFT Layout for Higher LCD Aperture Ratio
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Solution Overview
Problem
The development of high-resolution liquid-crystal display (LCD) panels is limited by the large size of indium gallium zinc oxide (IGZO) thin film transistors (TFTs) required to enhance pixel charging rate, which decreases the aperture ratio.
Innovation Solution
A vertical structure TFT design with a hole penetrating the interlayer insulating layer, where the first gate is embedded and the first active layer connects to the first source and drain, reducing the projected area and increasing the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of IGZO TFT is increased to ensure pixel charging rate, then the charging rate is improved, but the aperture rate decreases
Solution Approach 1:
The patent transitions from a planar TFT structure to a three-dimensional vertical structure by forming the active layer on the side wall of a hole penetrating the interlayer insulating layer. This dimensional change allows the TFT to utilize vertical space rather than only horizontal space, reducing the projected area while maintaining sufficient channel length for adequate charging rate.
Solution Approach 2:
The active layer is nested on the side wall of the hole within the interlayer insulating layer, and the gate electrode is embedded within the interlayer insulating layer surrounding the hole. This nested configuration allows multiple components to occupy overlapping spatial regions, effectively reducing the overall footprint of the TFT when viewed from above.
2Productivity
If the size of IGZO TFT is increased to ensure pixel charging rate, then the charging rate is improved, but the display resolution is limited
Solution Approach 1:
By forming the active layer on the vertical side wall of the hole rather than on a horizontal plane, the patent reduces the horizontal footprint of each pixel transistor. This enables higher pixel density and improved display resolution while maintaining the channel length necessary for adequate charging performance.
3Area of stationary object
If the projected area of TFT is reduced to improve aperture rate, then the aperture rate is improved, but the carrier mobility must be compensated
Solution Approach 1:
The vertical configuration allows the channel length to extend vertically through the hole depth rather than horizontally. This maintains sufficient channel length for carrier transport while reducing the horizontal projected area, thereby improving aperture rate without sacrificing carrier mobility performance.
Solution Approach 2:
The patent uses a composite structure combining the interlayer insulating layer material (such as silicon nitride and silicon oxide) with the active layer material (metal oxide like IGZO). This composite configuration provides both the necessary electrical characteristics for carrier mobility and the structural support for the vertical geometry.
Data Source
AI summary
A display panel and an array substrate are provided. The array substrate includes a first thin film transistor of a vertical structure. The first TFT includes a first source, an interlayer insulating layer, a first gate, a first drain, and a first active layer. The interlayer insulating layer covers the first source. A hole penetrates the interlayer insulating layer. The first gate is embedded in the interlayer insulating layer. The first drain is disposed on a side of the insulating layer away from the first source. The first active layer connects to the first source and the first drain via the hole.