Vertical III-V Bipolar Transistor High Blocking Voltage Design
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Solution Overview
Problem
Current technologies face challenges in developing high-blocking III-V bipolar transistors capable of handling voltages above 400 V with high-frequency operation, as III-V semiconductors like gallium arsenide are typically limited to low blocking voltages below 20 V for high-frequency applications.
Innovation Solution
A vertical high-blocking III-V bipolar transistor design featuring a highly doped emitter and collector semiconductor regions with specific dopant concentrations and lattice constants, along with a low-doped base region, and metallic connecting contact layers, which enables high operating voltages above 50 V and base-collector breakdown voltages above 200 V, while maintaining high switching frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If III-V semiconductors are used for high-frequency operation, then switching speed is improved, but blocking voltage capability deteriorates (limited to below 20 V)
Solution Approach 1:
The patent applies parameter changes by carefully controlling dopant concentrations in different regions. The emitter is highly doped (greater than 1·10^18 cm^-3) to enable high-frequency operation, while the collector is low-doped with a thickness greater than 10 μm to achieve high blocking voltages (above 400 V). This parameter optimization allows III-V bipolar transistors to operate at both high frequencies and high voltages simultaneously.
2Reliability
If high dopant concentration is used in emitter and collector, then electrical conductivity is improved, but manufacturing precision requirements worsen
Solution Approach 1:
The patent applies local quality by creating different dopant concentration profiles in different regions of the transistor. The emitter has high dopant concentration (greater than 1·10^18 cm^-3) for high conductivity and frequency response, while the collector has low dopant concentration for high blocking voltage. The base region has intermediate doping to balance transport and breakdown characteristics. This spatial variation in dopant quality allows each region to be optimized for its specific function.
Data Source
AI summary
A vertical high-blocking III-V bipolar transistor, which includes an emitter, a base and a collector. The emitter has a highly doped emitter semiconductor contact region of a first conductivity type and a first lattice constant. The base has a low-doped base semiconductor region of a second conductivity type and the first lattice constant. The collector has a layered low-doped collector semiconductor region of the first conductivity type with a layer thickness greater than 10 μm and the first lattice constant. The collector has a layered highly doped collector semiconductor contact region of the first conductivity type. A first metallic connecting contact layer is formed in regions being integrally connected to the emitter. A second metallic connecting contact layer is formed in regions being integrally connected to the base. A third metallic connecting contact region is formed at least in regions being arranged beneath the collector.