Vertical Semiconductor Implantation Layout for Von-Eoff Trade-Off
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Solution Overview
Problem
Current semiconductor device manufacturing methods face challenges in optimizing carrier implantation efficiency, leading to trade-offs between switching loss (Von) and turn-off time (Eoff) due to the limitations of existing implantation region configurations.
Innovation Solution
The implementation of alternately arranged first and second implantation portions with varying doping concentrations and geometries, specifically the first implantation portion with higher doping and the second with lower implantation efficiency, to modulate carrier distribution and improve the Von-Eoff trade-off characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single implantation region configuration is used, then manufacturing process is simple, but carrier implantation efficiency cannot be optimized leading to trade-off between switching loss and turn-off time
Solution Approach 1:
The implantation region is divided into multiple distinct portions (first implantation portion with first doping concentration and second implantation portion with second doping concentration) that are alternately arranged. This segmentation allows different regions to contribute differently to carrier implantation, enabling optimization of both switching loss and turn-off time simultaneously, thereby resolving the technical contradiction between implantation efficiency and configuration complexity.
Solution Approach 2:
Different doping concentrations are applied to different spatial regions (first implantation portion versus second implantation portion). The first implantation portion has a first doping concentration while the second implantation portion has a second doping concentration, creating local quality variations that optimize carrier distribution. This local differentiation enables improved carrier implantation efficiency without requiring overall structural complexity.
2Loss of energy
If higher doping concentration is applied uniformly, then switching loss (Von) is reduced, but turn-off time (Eoff) increases
Solution Approach 1:
The uniform doping approach is segmented into alternating first and second implantation portions with different doping concentrations. This allows the first implantation portion to contribute to reducing switching loss while the second implantation portion maintains optimal turn-off time, resolving the trade-off between energy loss and time loss through spatial segmentation of doping characteristics.
Solution Approach 2:
The doping concentration parameter is changed spatially by introducing alternating first and second implantation portions with different doping concentrations. This parameter variation allows optimization of both switching loss and turn-off time by having different regions contribute differently to these parameters, eliminating the need to choose between reduced switching loss or maintained turn-off time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier implantation efficiency, reducing switching loss while maintaining optimal turn-off time, thereby improving the overall performance of semiconductor devices.
Implementation Method 1
the first implantation portion 171 and the second implantation portion 172 with lower implantation efficiency of carriers than the first implantation portion 171 are alternately provided in a predetermined direction below the drift region 18
Data Source
AI summary
Provided is a semiconductor device provided with a vertical element, where the vertical element has: a drift region of a first conductivity type provided in a semiconductor substrate; a first implantation portion provided below the drift region; and a second implantation portion provided below the drift region and having lower carrier implantation efficiency than the first implantation portion, an area of the first implantation portion is larger than an area of the second implantation portion at a back surface of the semiconductor substrate, and the vertical element has the first implantation portion and the second implantation portion which are alternately provided in a predetermined direction.