Vertical Thin-Film Inductor Packaging for Shorter IC Power Paths
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Solution Overview
Problem
Conventional integrated circuit (IC) packaging with thin-film inductors on printed circuit boards (PCBs) occupies significant PCB footprint, increasing costs and causing adverse effects on circuit performance due to long electrical path lengths between the IC and inductors.
Innovation Solution
The integration of a vertical thin-film inductor extending from the IC's input/output pad to a solder bump within the IC package, which reduces PCB footprint usage and minimizes electrical path lengths, allowing for improved stabilization and performance of supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If inductors are mounted on PCB separate from IC, then inductors can be independently manufactured and assembled, but PCB footprint increases and electrical path length increases
Solution Approach 1:
The patent merges the inductor and IC into a single integrated package structure. The inductor is formed within the IC package body, with its terminals directly connected to IC pads through internal wiring, eliminating the need for separate PCB mounting of inductors and thereby reducing PCB footprint.
Solution Approach 2:
The inductor structure is nested within the IC package body. The inductor winding is formed inside the package, surrounded by protective encapsulant material, creating a compact nested configuration that saves PCB space while maintaining inductor functionality.
2Ease of manufacture
If inductors are mounted on PCB separate from IC, then independent assembly is possible, but electrical path length between IC and inductor increases
Solution Approach 1:
By combining the inductor and IC into one package with direct internal electrical connections, the patent eliminates long external PCB traces. The electrical path length is reduced to minimal internal wiring within the package, improving signal integrity and reducing parasitic effects.
3Area of stationary object
If vertical thin-film inductor is integrated on IC die, then PCB footprint is reduced and electrical path length is minimized, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from planar inductor layouts to a vertical three-dimensional structure. The thin-film inductor is formed vertically on the IC die surface, utilizing the third dimension to achieve compact integration while maintaining manufacturability through standard thin-film deposition techniques.
Solution Approach 2:
The patent changes the geometric parameters of the inductor from horizontal expansion to vertical growth. By forming the inductor winding in the vertical direction with controlled film thickness and pattern dimensions, the design achieves compact footprint while using established semiconductor manufacturing processes.
4Reliability
If vertical thin-film inductor is integrated on IC die, then electrical path length is minimized for improved performance, but manufacturing precision requirements increase
Solution Approach 1:
The patent optimizes geometric parameters including film thickness (50-200 nm), winding pitch (1-5 µm), and vertical height (10-50 µm) to achieve the desired inductance values while maintaining manufacturing feasibility. These controlled parameters enable precise inductor characteristics with standard fabrication processes.
Data Source
AI summary
An integrated circuit (IC) package, including an integrated circuit (IC) die including an input/output (I/O) pad, and a vertical thin-film inductor (TFI) extending vertically substantially from the I/O pad to a solder bump.