Vertical Interconnects Using Metal Around Dielectric Pillars

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current integrated circuit technologies face challenges in efficiently forming vertical interconnects without increasing fabrication complexity or cost, while ensuring sufficient adhesion and minimizing the combined area of dielectric pillars to maintain a planar top surface of the interconnect metal layer.

Innovation Solution

The formation of vertical interconnects involves creating dielectric pillars with specific horizontal sizes and spacing to ensure adequate adhesion and minimal combined area, using processes like plasma etching and chemical mechanical polishing to form a continuous interconnect metal layer around the pillars, which are arranged in a pattern to maintain a prescribed maximum horizontal distance from the pillar boundaries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dielectric pillars are used to form vertical interconnects, then electrical connectivity between components is achieved, but the combined area of pillars increases and planarity of the top surface deteriorates

Engineering Contradiction:
Improveelectrical connectivityVSAvoidcombined area of dielectric pillars
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from traditional planar interconnects to three-dimensional vertical interconnects by forming metal structures around dielectric pillars. This dimensional change allows electrical connectivity to be achieved in the vertical dimension while minimizing the horizontal footprint, thus reducing the combined area of pillars and maintaining a planar top surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where conductive metal layers are formed around dielectric pillars, creating a core-shell configuration. The metal interconnect material surrounds and adheres to the dielectric pillar surface, forming a nested arrangement that provides both electrical connectivity and mechanical support while minimizing the overall area occupied by the interconnect structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Ease of manufacture

If traditional via formation processes are used, then fabrication simplicity is maintained, but adhesion of interconnect metal to underlying structures is insufficient

Engineering Contradiction:
Improvefabrication simplicityVSAvoidadhesion of interconnect metal
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary surface treatment to the dielectric pillars before metal deposition. The pillars undergo plasma treatment or chemical modification to create a surface with enhanced adhesion properties. This preliminary action ensures that subsequent metal layers adhere strongly to the pillar surfaces, solving the adhesion problem while maintaining process simplicity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs composite material structures consisting of multiple layers including adhesion promoters, barrier layers, and conductive metal layers. These composite interconnect structures provide both strong adhesion to underlying dielectric pillars and excellent electrical conductivity, resolving the adhesion issue while keeping the fabrication process straightforward.

Inventive Principle:
Principle #40Composite materials

3Strength

If pillar size is increased to ensure adhesion, then adhesion strength improves, but the combined area of pillars increases and planarity is lost

Engineering Contradiction:
Improveadhesion strengthVSAvoidplanar top surface
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

The patent implements local quality enhancement by treating only the surface of the dielectric pillars with adhesion-promoting modifications rather than increasing the overall pillar size. The surface treatment creates localized high-adhesion zones at the metal-dielectric interface, providing strong adhesion strength while maintaining small pillar dimensions and preserving the planar top surface of the interconnect layer.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the efficient formation of vertical interconnects that connect components in integrated circuits without adding complexity or cost, ensuring a planar top surface and effective electrical connectivity while minimizing the combined area of the pillars.

Implementation Method 1

using processes like plasma etching and chemical mechanical polishing to form a continuous interconnect metal layer around the pillars

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 2

using processes like plasma etching and chemical mechanical polishing to form a continuous interconnect metal layer around the pillars

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS9048297B2Contact and via interconnects using metal around dielectric pillars
Publication Date: 2015.06.02 TEXAS INSTRUMENTS INC
  • US9048297B2 patent drawing
  • US9048297B2 patent drawing
  • US9048297B2 patent drawing

AI summary

An integrated circuit containing a vertical interconnect that includes a region of interconnect metal continuously surrounding one or more dielectric pillars. The vertical interconnect electrically contacts a top surface of a lower conductive structure. An upper conductive structure contacts a top surface of the vertical interconnect. A process of forming an integrated circuit that includes forming a vertical interconnect that has a region of interconnect metal continuously surrounding one or more dielectric pillars. The vertical interconnect electrically contacts a top surface of a lower conductive structure, and an upper conductive structure contacts a top surface of the vertical interconnect.