Vertical Semiconductor Memory Column Layout for Layered Charge Storage
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in optimizing the configuration and operation of conductive layers and semiconductor columns to enhance data storage efficiency and reliability.
Innovation Solution
The semiconductor memory device incorporates a novel configuration with multiple conductive layers and semiconductor columns, including electric charge accumulating films and specific wiring arrangements to improve data storage efficiency and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple conductive layers and semiconductor columns are configured to improve data storage efficiency, then storage capacity increases, but device complexity increases
Solution Approach 1:
The memory device is segmented into multiple independent conductive layers (first conductive layer, second conductive layer, third conductive layer) with distinct functions. Each layer can be configured and operated independently, allowing complex storage functionality to be achieved through modular segmentation rather than a monolithic complex structure.
Solution Approach 2:
The patent transitions from two-dimensional planar memory structures to three-dimensional vertical structures by stacking multiple conductive layers and semiconductor columns in the thickness direction. This dimensional change enables increased storage capacity without proportionally increasing planar complexity.
2Productivity
If conductive layers are arranged in multiple directions to improve electrical connectivity, then operational efficiency increases, but manufacturing precision requirements increase
Solution Approach 1:
Different conductive layers are assigned different local qualities and functions: the first conductive layer serves as a bit line, the second conductive layer serves as a word line, and the third conductive layer serves as a select line. Each layer has optimized electrical properties and connectivity patterns suited to its specific function, allowing high operational efficiency without requiring uniform high-precision alignment across all layers.
Solution Approach 2:
Insulating films are introduced as intermediary elements between adjacent conductive layers to provide electrical isolation and mechanical spacing. These intermediaries enable precise positioning and alignment of conductive layers during manufacturing, reducing the direct precision requirements between conductive layers while maintaining operational efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed configuration enhances data storage efficiency and reliability by optimizing the electrical connections and operations within the memory device, leading to improved performance and functionality.
Implementation Method 1
a first electric charge accumulating film disposed between the plurality of first conductive layers and the first semiconductor column
Data Source
AI summary
A semiconductor memory device includes a substrate, a plurality of first conductive layers, a second conductive layer disposed at a position farther from or a position closer to the substrate than the plurality of first conductive layers, a first semiconductor column, a first electric charge accumulating film, a first wiring disposed at a position farther from or a position closer to the substrate than the plurality of first conductive layers and the second conductive layer, a first contact that is disposed between one end of the second conductive layer and the first semiconductor column and is electrically connected to the second conductive layer and the first wiring, and a second contact that is disposed between another end of the second conductive layer and the first semiconductor column and is electrically connected to the second conductive layer and the first wiring.