Vertical Memory Connection Structure for Higher 3D Cell Density
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Solution Overview
Problem
Existing semiconductor devices face challenges in increasing data storage capacity, particularly in implementing three-dimensional memory cells to enhance storage capabilities.
Innovation Solution
A semiconductor device with a stepped connection portion and insulating blocks doped with specific dopant elements, featuring a plug structure that passes through the insulating blocks in a vertical direction, enhancing the integration of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged two-dimensionally, then device structure is simple, but data storage capacity is limited
Solution Approach 1:
The patent transitions from two-dimensional memory cell arrangement to three-dimensional arrangement by stacking multiple memory cell layers vertically. Each layer includes memory cells formed over channel structures, with gate electrodes and insulating layers arranged in multiple levels, thereby increasing storage capacity while maintaining manageable structural complexity through systematic layering
2Manufacturing precision
If dopant elements with atomic weight 5-15 are used in silicon oxide film, then manufacturing precision is improved, but material selection is restricted
Solution Approach 1:
The patent specifies dopant elements with atomic weights in the range of 5-15 (such as boron, carbon, nitrogen, oxygen, fluorine) to achieve optimal doping precision in silicon oxide films. This parameter-based selection criteria balances manufacturing precision requirements with reasonable material versatility within the defined atomic weight range
3Reliability
If insulating blocks are used to cover stepped connection portions, then device reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent divides the insulating structure into separate blocks that cover different stepped connection portions at various levels. Each insulating block is formed independently to protect specific connection regions, improving device reliability while allowing modular manufacturing that reduces overall complexity through systematic segmentation of the insulation function
Data Source
AI summary
A semiconductor device includes: a stepped connection portion having a plurality of conductive pad portions disposed on a substrate; an insulating block covering the plurality of conductive pad portions, wherein the insulating block has a first surface and a second surface, wherein the first surface faces the stepped connection portion, wherein the second surface is flat and extends in a direction parallel to a first surface of the substrate, wherein the insulating block includes a silicon oxide film doped with a dopant element including a metalloid element or a non-metal element, wherein the dopant element has an atomic weight within a range of 5 to 15; and at least one plug structure passing through the insulating block in a vertical direction with respect to the first surface of substrate.