Vertical Non-Volatile Memory Contact Gate Stack Segmentation
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Solution Overview
Problem
Current non-volatile memory devices face challenges in improving integration density, particularly in NAND flash memory, where vertically stacking memory cells is necessary but requires efficient formation of contact electrodes in connection areas.
Innovation Solution
A vertical non-volatile memory device design featuring a contact gate stack structure with gate lines stacked vertically, insulating layers, and separation insulating layers around contact holes, allowing contact electrodes to be easily formed and electrically connected to the uppermost gate line, facilitating efficient electrical connections and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are vertically stacked to improve integration density, then the degree of integration is improved, but the formation of contact electrodes in connection areas becomes more difficult
Solution Approach 1:
The connection area is divided into multiple connection holes extending in the vertical direction, with each hole containing a contact electrode that connects to specific gate lines. The gate lines are segmented and positioned at different heights, allowing independent connection to each gate line through separate contact electrodes, thereby simplifying the manufacturing process while maintaining high integration density
Solution Approach 2:
The patent transitions from planar contact electrode formation to vertical three-dimensional contact electrode formation. Contact holes extend in the vertical direction through insulating layers, and contact electrodes are positioned at different heights to connect to gate lines stacked vertically, enabling efficient electrical connection in the vertical dimension while improving integration density
2Quantity of substance
If gate lines are stacked vertically in connection area, then integration density is improved, but electrical connection to gate lines becomes more complex
Solution Approach 1:
The gate lines are segmented and positioned at different heights within the vertical stack. Each gate line can be independently connected to contact electrodes through the insulating layers, allowing simplified electrical connection to each individual gate line rather than requiring complex routing to access each gate line horizontally
Solution Approach 2:
Insulating layers serve as intermediaries between the vertically stacked gate lines and the contact electrodes. These insulating layers are selectively removed or penetrated to form connection holes, providing a straightforward pathway for electrical connection from contact electrodes to specific gate lines at different heights, thereby simplifying the overall connection structure
Data Source
AI summary
A vertical non-volatile memory device includes, a substrate, a contact gate stack structure including a plurality of gate lines stacked in a vertical direction on the substrate, the vertical direction being perpendicular to a surface of the substrate, a plurality of insulating layers between the gate lines, a plurality of separation insulating layers in contact with a protruding end of each of the plurality of gate lines, respectively, in a horizontal direction at both sides of a contact hole, wherein the contact hole extends in the vertical direction in the contact gate stack structure so that the protruding ends of the plurality of gate lines protrude from an inner wall of the contact hole, the horizontal direction being horizontal to the surface of the substrate, and a contact electrode at the contact hole and electrically connected to an uppermost gate line among the plurality of gate lines.