Vertical Memory Contact Plug Layout for Simultaneous CSL Formation
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Solution Overview
Problem
In manufacturing VNAND flash memory devices with a cell-over-peri (COP) structure, the formation of a common source line (CSL) and contact plugs requires separate processes, increasing the number of steps and complicating the formation of multiple contact plugs that need to connect to corresponding pads.
Innovation Solution
A method is introduced where the CSL and contact plugs are simultaneously formed, reducing the number of processes and eliminating the need for exact process control by creating a vertical memory device with gate electrodes stacked vertically, featuring stepped extensions and pads with increased thickness, allowing contact plugs to connect to specific gate electrodes while being insulated from others.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the common source line and contact plugs are formed by independent processes, then each component can be formed with dedicated process control, but the number of manufacturing steps increases and process complexity increases
Solution Approach 1:
The patent merges the formation of the common source line and contact plugs into a single simultaneous process step. The contact plugs are formed to extend through the gate electrode and insulating interlayer to contact the pad, while the common source line is formed in the same process step, eliminating the need for separate independent processes and reducing overall manufacturing complexity
2Manufacturing precision
If separate processes are used for forming CSL and contact plugs, then each component can be optimized independently, but the manufacturing time and process duration increase
Solution Approach 1:
The patent implements continuous useful action by forming both the contact plugs and common source line in a single uninterrupted process step. The contact plugs extend through the gate electrode and insulating interlayer to contact the pad, while the common source line is simultaneously formed, eliminating idle time between separate processes and reducing total manufacturing cycle time
3Reliability
If multiple contact plugs need to contact corresponding pads, then electrical connectivity is improved, but the difficulty of forming and aligning multiple contact plugs increases
Solution Approach 1:
The patent applies universality by designing a single process step that simultaneously forms multiple contact plugs and the common source line. The process is configured to handle multiple contact plug formations in unison, where each contact plug extends through the gate electrode and insulating interlayer to contact its corresponding pad, while the common source line is formed in the same step, reducing the overall difficulty compared to forming each component separately
Data Source
AI summary
A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.