Vertical Memory Device Dummy Cell Threshold Control
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Solution Overview
Problem
As memory devices become more multifunctional and integrated, there is a need for improved electrical characteristics and data reliability, which is challenging due to the complexity of operation circuits and wiring structures, especially with the reduction in memory cell sizes.
Innovation Solution
A vertical memory device is developed with a method that includes electrically separating a dummy hole from a substrate by programming a dummy cell, using a plurality of vertical holes extending through word lines and dummy word lines, and controlling threshold voltages to improve electrical characteristics and reduce loading during memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cell sizes are reduced for higher integration, then device capacity and integration degree are improved, but operation circuits and wiring structures become more complicated
Solution Approach 1:
The patent transitions from planar memory structure to vertical memory structure by extending memory cells in the third dimension (vertical direction). Word lines and bit lines are arranged vertically with memory cells formed between them, allowing higher integration without proportionally increasing wiring complexity in the plane.
Solution Approach 2:
The memory device is divided into multiple memory blocks, each containing memory cells arranged in vertical strings. This segmentation allows independent operation of different blocks and simplifies the control logic for large-capacity memory devices.
2Productivity
If memory cell sizes are reduced for higher integration, then device capacity is improved, but electrical characteristics deteriorate
Solution Approach 1:
Dummy cells are strategically placed at specific locations (e.g., at ends of word line segments) to locally compensate for electrical characteristics. These dummy cells have different threshold voltage requirements than main memory cells, allowing optimization of read margins without affecting overall device capacity.
Solution Approach 2:
Dummy cells act as intermediary elements between the read circuitry and main memory cells. During read operations, dummy cells can be programmed to specific threshold voltages that serve as reference levels, improving the accuracy of read margin detection and overall electrical characteristics.
3Ease of manufacture
If dummy holes are present in the substrate, then manufacturing is simplified, but parasitic capacitance increases and electrical characteristics worsen
Solution Approach 1:
Dummy holes that would normally remain in the substrate after memory cell formation are extracted or filled by forming dummy cells. This eliminates the parasitic capacitance caused by empty holes while maintaining the manufacturing simplicity of having uniform hole patterns throughout the substrate.
Solution Approach 2:
The threshold voltage of dummy cells is specifically controlled to be different from main memory cells (typically higher threshold voltage). This parameter change allows dummy cells to remain off during normal read operations, eliminating their parasitic capacitance effect on signal integrity while still providing the manufacturing benefit of filled holes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances electrical characteristics and data reliability by reducing parasitic capacitance and improving the integration of memory devices, leading to better performance in memory operations such as data reading.
Implementation Method 1
controlling threshold voltages to improve electrical characteristics
Implementation Method 2
reducing parasitic capacitance
Data Source
AI summary
A memory device including at least one dummy word line over a substrate; a plurality of word lines over the dummy word line; and a plurality of vertical holes extending through the at least one dummy word line and the plurality of word lines in a direction perpendicular to the substrate and classified into channel holes and dummy holes, each of the channel holes being connected to a bit line. The method including performing an erase operation on dummy cells formed as the dummy word line and the dummy holes; verifying the erase operation; and performing a program operation on at least one of the dummy cells such that the at least one dummy cell has a higher threshold voltage than main cells formed as the dummy word line and the channel holes.