Vertical Memory Staircase Architecture for Trim-Etch Bottlenecks
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Solution Overview
Problem
The existing trim-etch process for forming stair steps in 3D NAND memory devices is inefficient and costly, particularly due to its low productivity and the requirement for thicker mask layers, which complicates lithography and increases the height difference between stair steps, making it difficult to achieve precise etching.
Innovation Solution
The semiconductor device employs a multi-level staircase architecture with a dummy staircase section between the first and second staircase sections, allowing for the reduction of trim-etch cycles and height differences, thereby improving processing efficiency by dividing the stack into sections and using a chop process to shift stair steps, and forming contact structures on each staircase section.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the existing trim-etch process is used to form stair steps, then the stair steps can be formed, but the productivity is low and the mask layer thickness increases
Solution Approach 1:
The patent divides the stack into multiple sections (first section, second section, third section) with corresponding first staircase, second staircase, and third staircase. This segmentation allows parallel processing of different sections, reducing the total number of trim-etch cycles required and improving productivity while maintaining manufacturing precision for each individual staircase.
2Manufacturing precision
If thicker mask layers are used in the trim-etch process, then the etching can be performed, but the lithography becomes complicated
Solution Approach 1:
By segmenting the stack into multiple sections with separate staircases, the patent enables the use of thinner mask layers for each individual trim-etch cycle. This reduces lithography complexity while still achieving the required etching precision, as each section can be processed independently with optimized mask thickness.
3Manufacturing precision
If the existing trim-etch process is used, then the stair steps are formed, but the height difference between stair steps increases
Solution Approach 1:
The patent divides the overall staircase structure into multiple separate staircases (first staircase, second staircase, third staircase) corresponding to different sections of the stack. This segmentation allows for better control of etching depth and height uniformity within each staircase, reducing the height difference between adjacent stair steps while maintaining the overall stair step formation precision.
4Manufacturing precision
If more trim-etch cycles are performed, then the stair steps can be formed with precision, but the processing time increases
Solution Approach 1:
By dividing the stack into multiple sections with corresponding staircases, the patent enables parallel processing where multiple staircases can be formed simultaneously or in fewer sequential cycles. This reduces the total processing time while maintaining the required stair step precision through optimized etching parameters for each section.
Solution Approach 2:
The patent employs a chop process to preliminarily shape and position the stair steps before final trim-etch cycles. This preliminary action reduces the amount of material that needs to be removed in subsequent trim-etch cycles, thereby reducing the total number of cycles required and decreasing processing time while maintaining precision.
Data Source
AI summary
In a semiconductor device, a stack of alternating gate layers and insulating layers is formed over a substrate. Channel structures are formed in an array region of the stack. A first staircase is formed at a first section of the stack. A second staircase is formed at a second section of the stack. The first staircase is positioned over the second staircase. The first staircase includes first group stair steps descending in a second direction parallel to the substrate and first division stair steps descending in a third direction and a fourth direction that are parallel to the substrate and perpendicular to the second direction. The third direction and the fourth direction are opposite to each other. The second staircase includes second group stair steps descending in the second direction and second division stair steps descending in the third direction and the fourth direction.