Vertical Memory Device Gate Length Control via Epitaxial Growth
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Solution Overview
Problem
The challenge lies in controlling the gate length of vertical memory devices, particularly when using monocrystalline materials, which is difficult due to increased resistance issues when polycrystalline materials are used, making it hard to stack multiple vertical devices effectively.
Innovation Solution
The solution involves forming pillar-shaped active regions with alternately stacked source/drain and channel layers, where the channel layers are formed by epitaxial growth to control the gate length, and using monocrystalline semiconductor materials for reduced resistance, allowing for easier stacking and increased storage density in three-dimensional memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polycrystalline material is used for the channel, then the device can be manufactured, but the channel resistance increases greatly
Solution Approach 1:
The patent changes the material parameter from polycrystalline to monocrystalline semiconductor material for the channel layer, which fundamentally alters the electrical properties by reducing grain boundary resistance and improving carrier mobility, thereby solving the high resistance problem while maintaining manufacturability through epitaxial growth processes
2Reliability
If monocrystalline material is used for the channel, then the resistance is reduced, but the gate length control becomes difficult
Solution Approach 1:
The patent transitions from planar gate length control to vertical thickness control of the channel layer. By forming the channel as a thin film through epitaxial growth and defining its dimension in the vertical direction rather than lateral direction, the gate length is precisely controlled by film thickness which can be accurately controlled by deposition processes, thereby solving the control difficulty while maintaining low resistance
3Productivity
If vertical devices are stacked, then the storage density is increased, but the resistance becomes excessively high
Solution Approach 1:
The patent changes the channel material parameter to monocrystalline semiconductor material with superior electrical properties, which reduces the resistance of each individual device in the stack. This allows multiple vertical devices to be stacked effectively without the total resistance becoming excessively high, thereby enabling increased storage density while maintaining acceptable resistance levels
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables well-controlled gate lengths, improved carrier mobility, and reduced leakage current, facilitating the stacking of vertical devices and increasing storage density in three-dimensional memory devices.
Implementation Method 1
the channel layers are formed by epitaxial growth to control the gate length
Data Source
AI summary
A memory device may include first and second pillar-shaped active regions formed on a substrate and extending upward. The first and second active regions are arranged in a first array and a second array, respectively. Each of the first active regions comprises alternatively stacked source/drain layers and channel layers, wherein the channel layers of the respective first active regions at a corresponding level are substantially coplanar with each other, and the source/drain layers of the respective first active regions at a corresponding level are substantially coplanar with each other. Each of the second active regions comprises an active semiconductor layer extending integrally. The memory device may include multiple layers of first storage gate stacks surrounding peripheries of and being substantially coplanar with the respective levels of the channel layers, and multiple layers of second storage gate stacks which surround peripheries of the respective second active regions.