Vertical Memory Device Merged Gate Wiring Structure
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Solution Overview
Problem
The increasing number of stacked memory cells in vertical memory devices makes it difficult to form and connect memory cells and wiring structures effectively.
Innovation Solution
A vertical memory device with a simple wiring structure, including gate electrodes, a channel, a merged pattern structure, and a cell contact plug, where the gate electrodes are stacked vertically, and the channel extends through them, with the merged pattern structure merging the ends of the gate electrodes and having a step shape, and the cell contact plug is electrically connected to pad patterns, extending through the merged pattern structure while being insulated from other gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked memory cells is increased to improve storage capacity, then the storage density is improved, but the difficulty of forming and connecting memory cells and wiring structures increases
Solution Approach 1:
The patent merges the gate electrode ends at each level into a single merged pattern structure. This consolidation reduces the number of separate wiring elements needed, simplifying the overall wiring structure while maintaining connectivity to multiple stacked memory cells. The merged pattern structure serves as a common connection point for gate electrodes across different levels, thereby reducing wiring complexity as the number of stacked cells increases.
Solution Approach 2:
The patent transitions from planar wiring to three-dimensional vertical stacking with merged pattern structures. By utilizing the vertical dimension and creating merged patterns that extend across multiple levels, the design accommodates more memory cells without proportionally increasing wiring complexity. The merged pattern structure occupies a shared spatial region across levels, effectively using vertical space to reduce horizontal wiring requirements.
2Reliability
If traditional wiring structures are used to connect gate electrodes, then electrical connection is achieved, but the wiring structure becomes complex and manufacturing efficiency decreases
Solution Approach 1:
The patent combines multiple gate electrode connections into a single merged pattern structure, reducing the total number of discrete wiring elements. This merger maintains reliable electrical connection to all gate electrodes while simplifying the manufacturing process, as fewer separate wiring formation steps are required compared to traditional individual wiring approaches.
Solution Approach 2:
The merged pattern structure serves multiple functions simultaneously: it acts as a common electrical connection point for gate electrodes across multiple levels, provides a unified wiring element that simplifies manufacturing, and maintains reliable signal distribution to all connected gate electrodes. This multi-functionality improves both electrical connection reliability and manufacturing efficiency.
Data Source
AI summary
A vertical memory device may include gate electrodes on a substrate, a merged pattern structure and a cell contact plug. The gate electrodes may be spaced apart in a first direction orthogonal to the substrate, and may extend in a second direction parallel to the substrate. The merged pattern structure may extend in the second direction while merging ends of the gate electrodes of each level. Edges of the merged pattern structure may have a step shape. The merged pattern structure may include pad patterns electrically connected to the gate electrodes. The cell contact plug may extend through the merged pattern structure and be electrically connected to one of the pad patterns. The cell contact plug may be electrically insulated from other gate electrodes. The cell contact plug may contact a conductive material underlying. An upper surface of the cell contact plug may only contact an insulation material.