Vertical Memory Pad Structure for Punch-Through Suppression
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Solution Overview
Problem
Existing vertical memory devices face challenges in maintaining reliable electrical connections and preventing punch-through phenomena due to the thickness and structural integrity of pad portions, which affects the density and reliability of memory cell arrays.
Innovation Solution
A vertical memory device design featuring multi-layered pad portions with a lower pad, upper pad, and buffer pad, along with a method for fabricating these structures, which includes forming sacrificial layers, air gaps, and replacing them with conductive materials to create thicker pad portions that prevent punch-through and enhance structural support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single-layer pad portions are used in existing vertical memory devices, then the device structure is simpler, but the electrical connection reliability is insufficient and punch-through phenomena occur
Solution Approach 1:
The pad portion is divided into multiple layers (first pad layer, second pad layer, third pad layer) with different materials and functions. Each layer serves specific purposes: the first pad layer provides electrical connection, the second pad layer prevents punch-through, and the third pad layer enhances structural support. This segmentation resolves the contradiction by improving reliability through functional differentiation while managing complexity through systematic layering.
Solution Approach 2:
The multi-layered pad structure employs composite materials with different properties in each layer. The first pad layer uses a conductive material for electrical connection, the second pad layer uses a material with higher mechanical strength to prevent punch-through, and the third pad layer uses yet another material to enhance overall structural support. This composite approach improves reliability by combining materials with complementary properties.
2Strength
If pad portions are made thicker to prevent punch-through, then structural support improves, but the fabrication process becomes more complex
Solution Approach 1:
Instead of creating a single thick pad layer, the structure segments the pad into multiple thinner layers (first, second, and third pad layers) with different materials. Each layer is formed through separate deposition processes, allowing precise control over thickness and material properties. This segmentation provides the necessary structural support while maintaining fabrication feasibility through standardized thin-film deposition techniques.
Solution Approach 2:
The multi-layered pad structure is formed before the memory cell array structures are completely assembled. The sacrificial layers are first formed, then the pad layers are deposited on top, and finally the sacrificial layers are replaced with gate electrodes and channel structures. This preliminary formation of the pad structure simplifies the overall fabrication process by establishing the support framework early.
3Reliability
If multi-layered pad portions are formed with sacrificial layers and air gaps, then punch-through phenomena are suppressed, but the manufacturing steps increase
Solution Approach 1:
Sacrificial layers are formed in advance at the locations where the multi-layered pad portions will eventually be created. These sacrificial layers serve as placeholders that define the pad region and provide structural support during subsequent fabrication steps. The air gaps are also formed preliminarily between the pad layers during the deposition process. This preliminary action enables punch-through suppression while integrating the complex structure into the standard fabrication flow.
Solution Approach 2:
The sacrificial layers are temporarily introduced to enable the formation of the multi-layered pad structure with air gaps, then discarded (removed) in a replacement process where the sacrificial layers are replaced with conductive materials to form the final gate electrodes and channel structures. This temporary use and subsequent removal of sacrificial layers allows the complex pad structure to be formed without permanently increasing device complexity.
4Reliability
If thicker pad portions are used to ensure structural integrity, then electrical connection reliability improves, but memory cell density decreases
Solution Approach 1:
The pad structure is segmented into multiple thin layers (first, second, and third pad layers) rather than using a single thick layer. Each layer has optimized thickness for its specific function: electrical connection, punch-through prevention, and structural support. This segmentation achieves the necessary structural integrity and reliability while minimizing the total vertical space occupied by the pad structure, thereby preserving memory cell density.
Solution Approach 2:
The multi-layered pad structure uses composite materials with different properties in each layer, allowing each layer to be optimized for its specific function at minimal thickness. The first pad layer provides electrical connection with minimal thickness, the second pad layer provides punch-through prevention with optimized material properties, and the third pad layer provides structural support. This composite approach achieves maximum reliability with minimum space consumption.
Data Source
AI summary
A vertical memory device includes a substrate, a plurality of gate electrodes vertically stacked over the substrate in a cell array region, and a plurality of multi-layered pad portions formed over the substrate in a contact region. Each multi-layered pad portion of the plurality of multi-layered pad portions extends from an end of a gate electrode of the plurality of gate electrodes. Each multi-layered pad portion of the plurality of multi-layered pad portions includes a lower pad, an upper pad spaced vertically apart from the lower pad, a buffer pad formed between the lower pad and the upper pad, and a pad interconnection portion interconnecting the lower pad and the upper pad.


