Vertical Memory Devices Using Quantum Dots for Low Voltage Operation
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Solution Overview
Problem
VNAND flash memory devices face high operation voltage and increased interference between stacked cells as the number of cells increases and cell size decreases, necessitating a solution for low operation voltage and reduced cell interference.
Innovation Solution
Incorporating quantum dots into the variable resistance structure of a vertical memory device, which allows for low-energy filament formation and low resistance distribution, enabling operation at a relatively low voltage and reducing interference between cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of stacked cells increases and cell size decreases to enhance integration density, then the integration degree improves, but the interference between cells increases and operation voltage becomes excessively high
Solution Approach 1:
The variable resistance structure is segmented into multiple depletion regions spaced apart in the vertical direction, with each region isolated by insulating layers. This segmentation reduces the interference between adjacent cells while maintaining high integration density through the vertical stacking architecture.
Solution Approach 2:
The patent transitions from planar cell arrangement to vertical stacking in the third dimension. Multiple cells are stacked vertically with gate electrodes arranged in layers, enabling high integration density without increasing lateral cell density that would cause interference.
2Reliability
If conventional charge storage structures are used in vertical memory devices, then information storage is achieved, but high operation voltage is required
Solution Approach 1:
The patent changes the fundamental parameter of the storage mechanism from charge-based (requiring high voltage) to resistance-based using quantum dots. The quantum dots exhibit variable resistance states that can be switched at lower voltages, thereby reducing operation voltage while maintaining reliable information storage capability.
Solution Approach 2:
The patent replaces the charge storage mechanism (electrical field-based) with a resistance-based mechanism using quantum dots. This substitution allows information storage to be achieved through resistance state changes rather than charge accumulation, enabling lower operation voltages.
3Use of energy by moving object
If quantum dots are incorporated into the variable resistance structure, then operation voltage is reduced and resistance distribution is lowered, but the structural complexity increases
Solution Approach 1:
The quantum dots are nested within the variable resistance structure, forming a hierarchical arrangement where quantum dots are embedded in the resistance layer. This nesting approach integrates the quantum dot functionality without requiring separate external structures, thereby limiting the increase in overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of quantum dots in the vertical memory device results in a low operation voltage requirement for information storage, enhanced integration density, and reduced resistance distribution, addressing the challenges of high voltage and interference in VNAND flash memory devices.
Implementation Method 1
Quantum dots have such a small size that they have a large surface area per unit volume and exhibit quantum confinement effects
Implementation Method 2
Quantum dots may absorb light from an excitation source and may emit light energy corresponding to an energy bandgap of the quantum dot
Implementation Method 3
The variable resistance structure may include quantum dots (QDs) therein
Implementation Method 4
The variable resistance structure may include a plurality of depletion regions spaced apart from each other in the first direction therein
Data Source
AI summary
A vertical memory device includes gate electrodes on a substrate and a first structure. The gate electrodes may be spaced apart from each other in a first direction perpendicular to an upper surface of the substrate. The first structure extends through the gate electrodes in the first direction, and includes a channel and a variable resistance structure sequentially stacked in a horizontal direction parallel to the upper surface of the substrate. The variable resistance structure may include quantum dots (QDs) therein.