Vertical Memory String Bonding With Anisotropic Conductive Adhesive

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Solution Overview

Problem

Existing semiconductor devices face challenges in efficiently integrating memory cells in a three-dimensional arrangement, which limits their data storage capacity and requires complex bonding methods that are difficult to execute, especially when dealing with small bonding pad widths and pitches.

Innovation Solution

A semiconductor device design that includes a peripheral circuit structure, a cell structure with vertically extending gate electrodes and channels, and a bonding structure using anisotropic conductive adhesive layers with conductive particles, which facilitates reliable electrical connections and mechanical attachments between the peripheral circuit and cell structures, even with small bonding pad dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are arranged in a three-dimensional configuration to increase data storage capacity, then data storage capacity is improved, but device complexity increases

Engineering Contradiction:
Improvedata storage capacityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from traditional two-dimensional memory cell arrangement to a three-dimensional configuration where memory strings extend vertically through multiple layers. This dimensional change allows significantly increased storage capacity within the same footprint by stacking memory cells in the vertical direction, with channels extending through vertically stacked gate electrodes across multiple insulating layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bonding structure is divided into multiple functional components: first and second bonding pads for electrical connection, first and second insulating layers for isolation and support, and an anisotropic conductive adhesive layer for mechanical bonding. This segmentation allows each component to be optimized independently, simplifying the overall complex bonding process while enabling reliable three-dimensional integration.

Inventive Principle:
Principle #1Segmentation

2Area of moving object

If bonding pad width and pitch are reduced to increase integration density, then integration density is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebonding pad areaVSAvoidbonding precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The anisotropic conductive adhesive layer serves as an intermediary between the bonding pads and insulating layers. This adhesive layer compensates for dimensional variations and misalignments that occur during manufacturing, allowing smaller bonding pads to be positioned with adequate precision while maintaining reliable electrical and mechanical connections. The adhesive's flow characteristics enable it to bridge small gaps and accommodate tolerances.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent utilizes the anisotropic conductive adhesive's unique property of having different conductivity characteristics in different directions. The adhesive allows electrical conduction in the vertical direction (between bonding pads) while maintaining mechanical bonding strength. By changing the physical and electrical parameters of the bonding interface through material selection, the system achieves reliable connections even with reduced bonding pad dimensions.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If complex bonding methods are used to achieve reliable connections in three-dimensional structures, then connection reliability is improved, but ease of manufacture deteriorates

Engineering Contradiction:
Improveconnection reliabilityVSAvoidease of manufacture
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The anisotropic conductive adhesive layer performs multiple functions simultaneously: it provides mechanical bonding between layers, establishes electrical connections between bonding pads, and compensates for alignment tolerances. This multi-functionality eliminates the need for separate bonding and wiring steps, simplifying the manufacturing process while ensuring reliable connections in the three-dimensional structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent replaces traditional mechanical bonding methods (such as direct metal-to-metal contact or wire bonding) with a chemical-adhesive-based approach using anisotropic conductive adhesive. This substitution allows for more tolerant alignment requirements and simplifies the bonding process, as the adhesive can be applied as a coating that self-aligns and cures, rather than requiring precise mechanical positioning and pressure bonding.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design enhances the reliability of electrical connections and mechanical attachments between the peripheral circuit and cell structures, thereby improving the data storage capacity and reducing the complexity of bonding processes in semiconductor devices.

Implementation Method 1

an anisotropic conductive adhesive layer located between the first insulating layer and the second insulating layer and between the first bonding pad and the second bonding pad, and including a plurality of conductive particles

Methodology Applied
Scientific EffectConduction (electrical): Conduction (electrical)

Data Source

PatentUS20250072001A1Semiconductor device having memory strings arranged in a vertical direction
Publication Date: 2025.02.27 SAMSUNG ELECTRONICS CO LTD
  • US20250072001A1 patent drawing
  • US20250072001A1 patent drawing
  • US20250072001A1 patent drawing

AI summary

A semiconductor device includes: a peripheral circuit structure including a substrate and a circuit that is disposed on the substrate; a cell structure disposed on the peripheral circuit structure and including gate electrodes and a channel that extends through the gate electrodes; and a bonding structure located between the peripheral circuit structure and the cell structure, wherein the bonding structure includes: a first insulating layer attached to the peripheral circuit structure; a first bonding pad disposed on the peripheral circuit structure and electrically connected to the circuit; a second insulating layer attached to the cell structure; a second bonding pad disposed on the cell structure and electrically connected to the gate electrodes; and an anisotropic conductive adhesive layer located between the first insulating layer and the second insulating layer and between the first bonding pad and the second bonding pad, and including a plurality of conductive particles.