Vertical Memory Wiring Simplification via Segmented Pad Patterns
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Solution Overview
Problem
As the number of stacked memory cells in vertical memory devices increases, the complexity of wiring structures for connecting these cells becomes a significant challenge, complicating the integration and functionality of these devices.
Innovation Solution
The proposed solution involves a vertical memory device design with gate patterns spaced apart vertically on a substrate, featuring a channel structure and contact plugs that are electrically insulated from each other, allowing for efficient electrical connections through pad patterns and conductive plugs, thereby simplifying the wiring structure and enhancing integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of stacked memory cells is increased to improve integration, then device capacity is improved, but wiring structure complexity increases
Solution Approach 1:
The device is segmented into multiple stacked memory cell layers, with each layer containing memory cells, gate patterns, and pad patterns. This segmentation allows independent formation and connection of each layer, reducing the complexity of interconnections compared to a monolithic structure.
Solution Approach 2:
The patent transitions from planar wiring to vertical stacking, utilizing the vertical dimension to increase device capacity. Memory cells are arranged in multiple layers stacked vertically, with pad patterns extending in the vertical direction to enable electrical connections between layers through contact plugs, thereby increasing capacity without proportionally increasing planar wiring complexity.
2Productivity
If more memory cells are stacked vertically to improve integration, then device capacity is improved, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into sequential steps for forming each layer stack. Insulation layers and pad patterns are formed in a stepwise manner, with each layer being independently manufactured and then stacked. This segmentation simplifies the overall manufacturing complexity by breaking down the multi-layer formation into manageable sequential operations.
Solution Approach 2:
Insulation layers and pad patterns are formed in advance before the final stacking process. The pad patterns are preliminarily formed with extended portions that protrude between gate patterns, and insulation layers are preliminarily formed to cover specific regions. These preliminary actions facilitate subsequent stacking and connection operations, reducing overall manufacturing complexity.
3Reliability
If contact plugs are made to pass through multiple structures to improve electrical connections, then electrical connectivity is improved, but structural complexity increases
Solution Approach 1:
The first contact plug merges multiple functions by simultaneously passing through the second structure (containing pad patterns) and making electrical connections with pad patterns of different layers. This merging of functions reduces the need for separate connection structures, thereby improving electrical connectivity while minimizing the increase in structural complexity.
Solution Approach 2:
The first contact plug acts as an intermediary element that facilitates electrical connections between pad patterns of different memory cell layers. By serving as a mediator that passes through the second structure and connects to multiple layers, it simplifies the overall connection architecture compared to having separate connection paths for each layer.
Data Source
AI summary
A vertical memory device is provided including a first structure on a substrate. The first structure includes gate patterns spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate to form a plurality of layers. A second structure is connected to the first structure. The second structure includes pad patterns electrically connected to the gate patterns of a respective one of the layers. A channel structure passes through the gate patterns. A first contact plug passes through the second structure and electrically connects with a pad pattern of one of the layers. The first contact plug is electrically insulated from gate patterns of other layers. At least one bent portion is included at each of a sidewall of the channel structure and a sidewall of the first contact plug.


