Vertical Memory Device Word Line Stress Reduction
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Solution Overview
Problem
As the number of word lines increases in memory devices, device defects occur due to stress caused by voltage differences, which existing technologies struggle to mitigate effectively without increasing the size of the memory device or affecting yield.
Innovation Solution
The memory device incorporates a substrate with stacked word line patterns, first and second contact plugs, and pass transistors, where the second contact plugs in the through-hole wiring area connect with selected word line patterns to reduce stress, and the first contact plugs in the cell wiring area connect with the remaining word lines, minimizing voltage differences and defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of word lines is increased for high integration, then the memory capacity is improved, but device defects occur due to stress from voltage differences
Solution Approach 1:
The patent divides the word line group into multiple sub-groups, with each sub-group having a dedicated common potential control wiring. This segmentation allows independent potential control for different portions of word lines, reducing stress caused by voltage differences while maintaining high integration capacity.
Solution Approach 2:
The patent introduces common potential control wirings as intermediary elements between the word lines and the potential control circuitry. These wirings act as mediators to distribute and regulate potential across multiple word line groups, preventing stress accumulation and device defects.
2Quantity of substance
If the number of word lines is increased for high integration, then the memory capacity is improved, but the wiring contact structure becomes more complex
Solution Approach 1:
The patent merges multiple word lines into groups, where each group shares a common potential control wiring. This merging reduces the total number of individual contact structures needed, simplifying the wiring contact structure while maintaining high memory capacity through vertical stacking.
Solution Approach 2:
The common potential control wirings serve multiple functions: they provide potential control for entire groups of word lines, reduce the number of individual contacts required, and simplify the overall wiring architecture. This multi-functionality reduces complexity while supporting high integration.
3Quantity of substance
If the number of word lines is increased for high integration, then the memory capacity is improved, but the degree of integration increases leading to more complex operating circuits
Solution Approach 1:
The patent transitions from a two-dimensional planar layout to a three-dimensional vertical stacking architecture. Word lines are stacked vertically with channel structures penetrating through them, allowing high integration capacity while keeping operating circuits compact and manageable in the horizontal plane.
Data Source
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AI summary
A memory device may include word line patterns stacked on a substrate and spaced from each other in a vertical direction, a channel structure extending in the vertical direction, and first contact plugs and second contact plugs extending in the vertical direction. The substrate includes a cell area, a cell wiring area, and a through-hole wiring area. The word line patterns may be on the cell area and may extend to the cell wiring area in a direction parallel to an upper surface of the substrate. The first contact plugs may be on the cell wiring area and each may be electrically connected with a corresponding one of the word line patterns and insulated from remaining word line patterns. The second contact plugs may be on the through-hole wiring area and at least one of the second contact plugs is electrically connected with a part of the word line patterns.