Vertical MIM Capacitor Single Patterning Fabrication
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Solution Overview
Problem
The high cost and complexity of fabricating horizontal MIM capacitors due to the need for separate pattern and etch levels for each plate, along with limited area and performance issues as devices scale to smaller dimensions.
Innovation Solution
The development of vertical MIM capacitors, which involve a single patterning and mask step, using a semiconductor substrate with a patterned insulator layer, selective deposition of a high k dielectric material on the metal conductor sidewall, and conformal deposition of a metal plate layer, allowing for the creation of a vertically oriented capacitor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If horizontal MIM capacitors are fabricated using separate pattern and etch levels for each plate, then the capacitor structure can be formed, but the fabrication cost and process complexity increase
Solution Approach 1:
The patent transitions from horizontal MIM capacitor configuration to vertical MIM capacitor configuration. By stacking the capacitor structure vertically rather than forming it horizontally with separate pattern and etch levels, the invention reduces fabrication process complexity while maintaining reliable capacitor structure formation. The vertical orientation allows both plates to be formed in a single patterning step followed by a single etch process.
2Reliability
If horizontal MIM capacitors are fabricated with separate pattern and etch levels, then the capacitor plates can be formed, but the device area increases
Solution Approach 1:
The invention changes the capacitor orientation from horizontal to vertical, utilizing the vertical dimension to stack capacitor plates above each other. This vertical stacking approach significantly reduces the lateral device area occupied by the capacitor while maintaining proper plate formation, as the capacitor structure extends in the vertical direction rather than consuming horizontal space.
3Productivity
If devices are scaled to smaller dimensions, then the integration density increases, but the area available for capacitor structures decreases
Solution Approach 1:
As devices are scaled to smaller dimensions, the invention employs vertical stacking to create capacitor structures that extend upward rather than outward. This approach maintains high integration density by reducing the lateral footprint of capacitors, allowing more capacitor structures to be packed into the available planar area while continuing to scale to smaller device dimensions.
4Ease of manufacture
If vertical MIM capacitors are formed with single patterning and mask step, then the fabrication cost reduces, but the manufacturing precision requirements increase
Solution Approach 1:
The vertical capacitor configuration with single patterning and mask step reduces fabrication cost by eliminating redundant processing steps. The single patterning step defines both capacitor plates in the vertical stack, and the subsequent single etch process forms both plates simultaneously, thereby reducing the number of alignment operations required compared to horizontal capacitor formation with multiple pattern and etch levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces fabrication costs and overcomes area limitations while improving performance by enabling the creation of smaller, more efficient capacitor structures with enhanced packing density and simplified processing steps.
Implementation Method 1
A high k dielectric material is selectively deposited onto a sidewall of the metal conductor
Implementation Method 2
A metal plate layer is conformally deposited onto the semiconductor substrate
Data Source
AI summary
Vertical metal-insulator-metal (MIM) capacitors include a metal conductor including a sidewall; a high k dielectric layer on the sidewall of the metal conductor; and a vertically oriented metal layer on the high k dielectric layer. Also disclosed are methods for fabricating the vertical MIM capacitor, wherein a single patterning/mask process can used to fabricate the vertical MIM capacitor structure.